📄 k9f1g08.txt
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000b6c e3a00b80 MOV r0,#0x20000
000b70 e3a0144a MOV r1,#0x4a000000
000b74 e5810000 STR r0,[r1,#0]
;;;856 rDISRC0=(unsigned)bufPt; // Nand flash data register
000b78 e1a0800a MOV r8,r10
000b7c e3a0044b MOV r0,#0x4b000000
000b80 e580a000 STR r10,[r0,#0]
;;;857 rDISRCC0=(0<<1) | (0<<0); //arc=AHB,src_addr=inc
000b84 e3a00000 MOV r0,#0
000b88 e3a0144b MOV r1,#0x4b000000
000b8c e5810004 STR r0,[r1,#4]
;;;858 rDIDST0=NFDATA;
000b90 e51f04f0 LDR r0,|L1.1704|
000b94 e3a0144b MOV r1,#0x4b000000
000b98 e5810008 STR r0,[r1,#8]
;;;859 rDIDSTC0=(0<<1) | (1<<0); //dst=AHB,dst_addr=fix;
000b9c e3a00001 MOV r0,#1
000ba0 e3a0144b MOV r1,#0x4b000000
000ba4 e581000c STR r0,[r1,#0xc]
;;;860 rDCON0=(1<<31)|(1<<30)|(1<<29)|(0<<28)|(1<<27)|(0<<23)|(1<<22)|(2<<20)|(2048/4);
000ba8 e59f01f4 LDR r0,|L1.3492|
000bac e3a0144b MOV r1,#0x4b000000
000bb0 e5810010 STR r0,[r1,#0x10]
;;;861 // only unit transfer in writing!!!!
;;;862 //Handshake,AHB,interrupt,(unit),whole,S/W,no_autoreload,word,count=128;
;;;863
;;;864 // DMA on and start.
;;;865 rDMASKTRIG0=(1<<1)|(1<<0);
000bb4 e3a00003 MOV r0,#3
000bb8 e3a0144b MOV r1,#0x4b000000
000bbc e5810020 STR r0,[r1,#0x20]
;;;866
;;;867 while(!(rSRCPND & BIT_DMA0)); // Wait until Dma transfer is done.
000bc0 e1a00000 NOP
|L1.3012|
000bc4 e3a0044a MOV r0,#0x4a000000
000bc8 e5900000 LDR r0,[r0,#0]
000bcc e3100b80 TST r0,#0x20000
000bd0 0afffffb BEQ |L1.3012|
;;;868 rSRCPND=BIT_DMA0;
000bd4 e3a00b80 MOV r0,#0x20000
000bd8 e3a0144a MOV r1,#0x4a000000
000bdc e5810000 STR r0,[r1,#0]
;;;869 #endif
;;;870 /*
;;;871 NF_MECC_Lock();
;;;872 // Get ECC data.
;;;873 // Spare data for 8bit
;;;874 // byte 0 1 2 3 4 5
;;;875 // ecc [0] [1] [2] [3] x [Bad marking]
;;;876 Mecc = rNFMECC0;
;;;877 se8Buf[0]=(U8)(Mecc&0xff);
;;;878 se8Buf[1]=(U8)((Mecc>>8) & 0xff);
;;;879 se8Buf[2]=(U8)((Mecc>>16) & 0xff);
;;;880 se8Buf[3]=(U8)((Mecc>>24) & 0xff);
;;;881 se8Buf[5]=0xffff; // Marking good block
;;;882
;;;883 //Write extra data(ECC, bad marking)
;;;884 for(i=0;i<16;i++) {
;;;885 NF_WRDATA8(se8Buf[i]); // Write spare array(ECC and Mark)
;;;886 NF8_Spare_Data[i]=se8Buf[i];
;;;887 }
;;;888
;;;889 NF_CLEAR_RB();
;;;890 NF_CMD(0x10); // Write 2nd command
;;;891 NF_DETECT_RB();
;;;892
;;;893 NF_CMD(0x70); // Read status command
;;;894
;;;895 for(i=0;i<3;i++); //twhr=60ns
;;;896
;;;897 if (NF_RDDATA()&0x1) {// Page write error
;;;898
;;;899 Uart_Printf("[PROGRAM_ERROR:block#=%d]\n",block);
;;;900 NF8_MarkBadBlock(block);
;;;901 NF_nFCE_H();
;;;902 return FAIL;
;;;903 } else {
;;;904 NF_nFCE_H();
;;;905 return OK;
;;;906
;;;907 }
;;;908 */
;;;909
;;;910 NF_MECC_Lock();
000be0 e3a0044e MOV r0,#0x4e000000
000be4 e5900004 LDR r0,[r0,#4]
000be8 e3800020 ORR r0,r0,#0x20
000bec e3a0144e MOV r1,#0x4e000000
000bf0 e5810004 STR r0,[r1,#4]
;;;911 // Get ECC data.
;;;912 // Spare data for 8bit
;;;913 // byte 0 1 2 3 4 5 6 7 8 9
;;;914 // ecc [Bad marking] [0] [1] [2] [3] x SECC0 SECC1
;;;915 Mecc = rNFMECC0;
000bf4 e3a0044e MOV r0,#0x4e000000
000bf8 e590502c LDR r5,[r0,#0x2c]
;;;916
;;;917 se8Buf[0]=0xff;
000bfc e3a000ff MOV r0,#0xff
000c00 e51f11e0 LDR r1,|L1.2600|
000c04 e5c10000 STRB r0,[r1,#0] ; se8Buf
;;;918 se8Buf[1]=(U8)(Mecc&0xff);
000c08 e51f01e8 LDR r0,|L1.2600|
000c0c e5c05001 STRB r5,[r0,#1] ; se8Buf
;;;919 se8Buf[2]=(U8)((Mecc>>8) & 0xff);
000c10 e1a00805 MOV r0,r5,LSL #16
000c14 e1a00c20 MOV r0,r0,LSR #24
000c18 e51f11f8 LDR r1,|L1.2600|
000c1c e5c10002 STRB r0,[r1,#2] ; se8Buf
;;;920 se8Buf[3]=(U8)((Mecc>>16) & 0xff);
000c20 e1a00405 MOV r0,r5,LSL #8
000c24 e1a00c20 MOV r0,r0,LSR #24
000c28 e51f1208 LDR r1,|L1.2600|
000c2c e5c10003 STRB r0,[r1,#3] ; se8Buf
;;;921 se8Buf[4]=(U8)((Mecc>>24) & 0xff);
000c30 e1a00c25 MOV r0,r5,LSR #24
000c34 e51f1214 LDR r1,|L1.2600|
000c38 e5c10004 STRB r0,[r1,#4] ; se8Buf
;;;922 // Marking good block
;;;923
;;;924 // NF_SECC_UnLock();
;;;925 //Write extra data(ECC, bad marking)
;;;926 for(i=0;i<5;i++) {
000c3c e3a04000 MOV r4,#0
|L1.3136|
000c40 e3540005 CMP r4,#5
000c44 aa00000b BGE |L1.3192|
000c48 ea000001 B |L1.3156|
|L1.3148|
000c4c e2844001 ADD r4,r4,#1
000c50 eafffffa B |L1.3136|
;;;927 NF_WRDATA8(se8Buf[i]); // Write spare array(Main ECC)
|L1.3156|
000c54 e51f0234 LDR r0,|L1.2600|
000c58 e7d00004 LDRB r0,[r0,r4]
000c5c e3a0144e MOV r1,#0x4e000000
000c60 e5c10010 STRB r0,[r1,#0x10]
;;;928 NF1G08_Spare_Data[i]=se8Buf[i];
000c64 e51f0244 LDR r0,|L1.2600|
000c68 e7d00004 LDRB r0,[r0,r4]
000c6c e51f15c4 LDR r1,|L1.1712|
000c70 e7c10004 STRB r0,[r1,r4]
;;;929 }
000c74 eafffff4 B |L1.3148|
;;;930 /* NF_SECC_Lock();
;;;931 Secc=rNFSECC;
;;;932 se8Buf[8]=(U8)(Secc&0xff);
;;;933 se8Buf[9]=(U8)((Secc>>8) & 0xff);
;;;934 */
;;;935 for(i=5;i<64;i++) {
|L1.3192|
000c78 e3a04005 MOV r4,#5
|L1.3196|
000c7c e3540040 CMP r4,#0x40
000c80 aa00000b BGE |L1.3252|
000c84 ea000001 B |L1.3216|
|L1.3208|
000c88 e2844001 ADD r4,r4,#1
000c8c eafffffa B |L1.3196|
;;;936 NF_WRDATA8(se8Buf[i]); // Write spare array(Spare ECC and Mark)
|L1.3216|
000c90 e51f0270 LDR r0,|L1.2600|
000c94 e7d00004 LDRB r0,[r0,r4]
000c98 e3a0144e MOV r1,#0x4e000000
000c9c e5c10010 STRB r0,[r1,#0x10]
;;;937 NF1G08_Spare_Data[i]=se8Buf[i];
000ca0 e51f0280 LDR r0,|L1.2600|
000ca4 e7d00004 LDRB r0,[r0,r4]
000ca8 e51f1600 LDR r1,|L1.1712|
000cac e7c10004 STRB r0,[r1,r4]
;;;938 }
000cb0 eafffff4 B |L1.3208|
;;;939 NF_CLEAR_RB();
|L1.3252|
000cb4 e3a0044e MOV r0,#0x4e000000
000cb8 e5900020 LDR r0,[r0,#0x20]
000cbc e3800004 ORR r0,r0,#4
000cc0 e3a0144e MOV r1,#0x4e000000
000cc4 e5810020 STR r0,[r1,#0x20]
;;;940 NF_CMD(0x10); // Write 2nd command
000cc8 e3a00010 MOV r0,#0x10
000ccc e3a0144e MOV r1,#0x4e000000
000cd0 e5810008 STR r0,[r1,#8]
;;;941 // NF_DETECT_RB();
;;;942 while(NFConDone_1G08==0);
000cd4 e1a00000 NOP
|L1.3288|
000cd8 e51f0ae0 LDR r0,|L1.512|
000cdc e5900000 LDR r0,[r0,#0] ; NFConDone_1G08
000ce0 e3500000 CMP r0,#0
000ce4 0afffffb BEQ |L1.3288|
;;;943 rNFCONT&=~(1<<9);
000ce8 e3a0044e MOV r0,#0x4e000000
000cec e5900004 LDR r0,[r0,#4]
000cf0 e3c00f80 BIC r0,r0,#0x200
000cf4 e3a0144e MOV r1,#0x4e000000
000cf8 e5810004 STR r0,[r1,#4]
;;;944 rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
000cfc e3a0044e MOV r0,#0x4e000000
000d00 e5900004 LDR r0,[r0,#4]
000d04 e3c00e40 BIC r0,r0,#0x400
000d08 e3a0144e MOV r1,#0x4e000000
000d0c e5810004 STR r0,[r1,#4]
;;;945 if(rNFSTAT&0x8) return FAIL;
000d10 e3a0044e MOV r0,#0x4e000000
000d14 e5900020 LDR r0,[r0,#0x20]
000d18 e3100008 TST r0,#8
000d1c 0a000001 BEQ |L1.3368|
000d20 e3a00000 MOV r0,#0
;;;946
;;;947 NF_CMD(0x70); // Read status command
;;;948
;;;949 for(i=0;i<3;i++); //twhr=60ns
;;;950
;;;951 if (NF_RDDATA()&0x1) {// Page write error
;;;952 EXT_NF_nFCE_H();
;;;953 Uart_Printf("[PROGRAM_ERROR:block#=%d]\n",block);
;;;954 NF1G08_MarkBadBlock(block);
;;;955 return FAIL;
;;;956 } else {
;;;957 EXT_NF_nFCE_H();
;;;958 return OK;
;;;959 }
;;;960
;;;961 }
|L1.3364|
000d24 e8bd87f0 LDMFD sp!,{r4-r10,pc}
|L1.3368|
000d28 e3a00070 MOV r0,#0x70 ;947
000d2c e3a0144e MOV r1,#0x4e000000 ;947
000d30 e5810008 STR r0,[r1,#8] ;947
000d34 e3a04000 MOV r4,#0 ;949
|L1.3384|
000d38 e3540003 CMP r4,#3 ;949
000d3c aa000001 BGE |L1.3400| ;949
000d40 e2844001 ADD r4,r4,#1 ;949
000d44 eafffffb B |L1.3384| ;949
|L1.3400|
000d48 e3a0044e MOV r0,#0x4e000000 ;951
000d4c e5900010 LDR r0,[r0,#0x10] ;951
000d50 e3100001 TST r0,#1 ;951
000d54 0a00000b BEQ |L1.3464| ;951
000d58 e3a00456 MOV r0,#0x56000000 ;952
000d5c e5900004 LDR r0,[r0,#4] ;952
000d60 e3800b40 ORR r0,r0,#0x10000 ;952
000d64 e3a01456 MOV r1,#0x56000000 ;952
000d68 e5810004 STR r0,[r1,#4] ;952
000d6c e1a01006 MOV r1,r6 ;953
000d70 e28f0030 ADR r0,|L1.3496| ;953
000d74 ebfffffe BL Uart_Printf ;953
000d78 e1a00006 MOV r0,r6 ;954
000d7c ebfffffe BL NF1G08_MarkBadBlock ;954
000d80 e3a00000 MOV r0,#0 ;955
000d84 eaffffe6 B |L1.3364| ;955
|L1.3464|
000d88 e3a00456 MOV r0,#0x56000000 ;957
000d8c e5900004 LDR r0,[r0,#4] ;957
000d90 e3800b40 ORR r0,r0,#0x10000 ;957
000d94 e3a01456 MOV r1,#0x56000000 ;957
000d98 e5810004 STR r0,[r1,#4] ;957
000d9c e3a00001 MOV r0,#1 ;958
000da0 eaffffdf B |L1.3364| ;958
|L1.3492|
000da4 e8600200 DCD 0xe8600200 ;958
|L1.3496|
000da8 4f52505b DCB "[PRO" ;958
000dac 4d415247 DCB "GRAM" ;958
000db0 5252455f DCB "_ERR" ;958
000db4 623a524f DCB "OR:b" ;958
000db8 6b636f6c DCB "lock" ;958
000dbc 64253d23 DCB "#=%d" ;958
000dc0 00000a5d DCB "]\n\0\0" ;958
ENDP
Test_NF1G08_Page_Write PROC
;;;271 void Test_NF1G08_Page_Write(void)
;;;272 {
000dc4 e92d43f8 STMFD sp!,{r3-r9,lr}
;;;273 U32 block=0, page=0;
000dc8 e3a06000 MOV r6,#0
000dcc e3a07000 MOV r7,#0
;;;274 int i, offset;
;;;275 unsigned char * srcPt;
;;;276 srcPt=(unsigned char *)0x31100000;
000dd0 e59f516c LDR r5,|L1.3908|
;;;277
;;;278 Uart_Printf("(K9F1G08) NAND Page Write.\n");
000dd4 e28f0f5b ADR r0,|L1.3912|
000dd8 ebfffffe BL Uart_Printf
;;;279 Uart_Printf("You must erase block before you write data!!! \n");
000ddc e28f0f60 ADR r0,|L1.3940|
000de0 ebfffffe BL Uart_Printf
;;;280
;;;281 Uart_Printf("Block # to write: ");
000de4 e28f0f6a ADR r0,|L1.3988|
000de8 ebfffffe BL Uart_Printf
;;;282 block = Uart_GetIntNum();
000dec ebfffffe BL Uart_GetIntNum
000df0 e1a06000 MOV r6,r0
;;;283 Uart_Printf("Page # to write: ");
000df4 e28f0f6b ADR r0,|L1.4008|
000df8 ebfffffe BL Uart_Printf
;;;284 page = Uart_GetIntNum();
000dfc ebfffffe BL Uart_GetIntNum
000e00 e1a07000 MOV r7,r0
;;;285 Uart_⌨️ 快捷键说明
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