📄 koe_channel_rake_inter.mdl
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} Block { BlockType Reference Name "hard decission" Ports [1, 1, 0, 0, 0] Position [435, 165, 535, 205] Orientation "up" SourceBlock "utra_lib/Test functions/hard decission" SourceType "" mode on N "N*length(C)/2" thres "0" nFrames "1" } Block { BlockType Reference Name "hard decission1" Ports [1, 1, 0, 0, 0] Position [440, 610, 540, 650] Orientation "left" NamePlacement "alternate" SourceBlock "utra_lib/Test functions/hard decission" SourceType "" mode off N "16*N" thres "0" nFrames "1" } Block { BlockType Reference Name "inter_de_interleaving" Ports [2, 2, 0, 0, 0] Position [650, 618, 785, 767] Orientation "left" ForegroundColor "blue" NamePlacement "alternate" SourceBlock "utra_lib/Modulation blocks/dl_RX_demodulation/""inter_de_interleaving" SourceType "" bits_in_frame "N*16" rows "1" nFrames "1" } Block { BlockType Reference Name "inter_interleaving" Ports [1, 1, 0, 0, 0] Position [55, 190, 155, 250] Orientation "down" ForegroundColor "blue" NamePlacement "alternate" SourceBlock "utra_lib/Modulation blocks/dl_TX_modulation/in""ter_interleaving" SourceType "" bits_in_frame "N*16" nFrames "1" cols "1" } Block { BlockType Reference Name "intra_de_interleaving" Ports [2, 2, 0, 0, 0] Position [880, 619, 1010, 766] Orientation "left" ForegroundColor "blue" NamePlacement "alternate" SourceBlock "utra_lib/Modulation blocks/dl_RX_demodulation/""intra_de_interleaving" SourceType "" nDeIntra "N*16" nFrames "1" Intra_int_flag "0" } Block { BlockType Reference Name "intra_interleaving1" Ports [1, 1, 0, 0, 0] Position [42, 275, 168, 345] Orientation "down" NamePlacement "alternate" SourceBlock "utra_lib/Modulation blocks/dl_TX_modulation/in""tra_interleaving" SourceType "" bits_in_frame "16*N" nFrames "1" nSlot "16" Intra_int_flag "0" } Block { BlockType Reference Name "modulation1" Ports [1, 2, 0, 0, 0] Position [180, 288, 250, 457] SourceBlock "utra_lib/Modulation blocks/dl_TX_modulation/mo""dulation" SourceType "" Ndisc "N" C "C" nSlot "16" } Line { SrcBlock "hard decission" SrcPort 1 Points [0, -5] DstBlock "Direct ber calculation1" DstPort 2 } Line { SrcBlock "Direct ber calculation1" SrcPort 1 Points [0, -10] Branch { DstBlock "Display36" DstPort 1 } Branch { DstBlock "To Workspace14" DstPort 1 } } Line { Labels [2, 0] SrcBlock "Channel estimator" SrcPort 1 Points [0, -5; 30, 0] Branch { Points [0, -55] DstBlock "To Workspace8" DstPort 1 } Branch { Points [75, 0] DstBlock "dl_rake" DstPort 2 } } Line { SrcBlock "modulation1" SrcPort 1 Points [15, 0] Branch { DstBlock "channel3" DstPort 1 } Branch { Points [0, -70; 45, 0] Branch { Points [105, 0] DstBlock "Direct ber calculation1" DstPort 1 } Branch { Points [-45, 0] DstBlock "To Workspace15" DstPort 1 } } } Line { SrcBlock "hard decission1" SrcPort 1 Points [-70, 0] DstBlock "Delayed ber calculation1" DstPort 2 } Line { SrcBlock "channel3" SrcPort 1 Points [60, 0] Branch { DstBlock "dl_rake" DstPort 1 } Branch { Points [0, -85] Branch { DstBlock "hard decission" DstPort 1 } Branch { DstBlock "To Workspace13" DstPort 1 } } } Line { SrcBlock "modulation1" SrcPort 2 DstBlock "channel3" DstPort 2 } Line { SrcBlock "channel3" SrcPort 4 DstBlock "dl_rake" DstPort 5 } Line { SrcBlock "channel3" SrcPort 3 Points [0, 5; 20, 0] Branch { DstBlock "Channel estimator" DstPort 2 } Branch { Points [0, 80] DstBlock "To Workspace11" DstPort 1 } } Line { SrcBlock "Channel estimator" SrcPort 3 DstBlock "dl_rake" DstPort 4 } Line { SrcBlock "Channel estimator" SrcPort 2 Points [10, 0] Branch { Points [95, 0] DstBlock "dl_rake" DstPort 3 } Branch { Points [0, 95] DstBlock "To Workspace9" DstPort 1 } } Line { SrcBlock "channel3" SrcPort 2 Points [25, 0] Branch { Points [15, 0] DstBlock "Channel estimator" DstPort 1 } Branch { Points [0, -60] DstBlock "To Workspace10" DstPort 1 } } Line { SrcBlock "Delayed ber calculation1" SrcPort 1 Points [0, 25] Branch { DstBlock "Display35" DstPort 1 } Branch { DstBlock "To Workspace12" DstPort 1 } } Line { SrcBlock "data source 01 ..10" SrcPort 1 Points [0, 20] Branch { DstBlock "To Workspace4" DstPort 1 } Branch { Points [0, 0] Branch { Labels [1, 0] Points [0, 525; 210, 0] DstBlock "Delayed ber calculation1" DstPort 1 } Branch { Points [50, 0] DstBlock "inter_interleaving" DstPort 1 } } } Line { SrcBlock "intra_interleaving1" SrcPort 1 Points [0, 25] DstBlock "modulation1" DstPort 1 } Line { SrcBlock "dl_rake" SrcPort 1 DstBlock "demodulation" DstPort 1 } Line { SrcBlock "dl_rake" SrcPort 2 DstBlock "demodulation" DstPort 2 } Line { SrcBlock "dl_rake" SrcPort 3 DstBlock "demodulation" DstPort 3 } Line { SrcBlock "dl_rake" SrcPort 4 DstBlock "demodulation" DstPort 4 } Line { SrcBlock "intra_de_interleaving" SrcPort 1 DstBlock "inter_de_interleaving" DstPort 1 } Line { SrcBlock "inter_interleaving" SrcPort 1 DstBlock "intra_interleaving1" DstPort 1 } Line { SrcBlock "demodulation" SrcPort 1 Points [20, 0; 0, 325] DstBlock "intra_de_interleaving" DstPort 1 } Line { SrcBlock "intra_de_interleaving" SrcPort 2 DstBlock "inter_de_interleaving" DstPort 2 } Line { SrcBlock "inter_de_interleaving" SrcPort 1 Points [-60, 0] Branch { Points [-30, 0] DstBlock "hard decission1" DstPort 1 } Branch { Points [0, -95] DstBlock "To Workspace7" DstPort 1 } } Line { SrcBlock "demodulation" SrcPort 2 Points [30, 0; 0, 320] DstBlock "intra_de_interleaving" DstPort 2 } Line { SrcBlock "inter_de_interleaving" SrcPort 2 DstBlock "To Workspace16" DstPort 1 } Annotation { Position [1028, 85] Text "Defined in opening this model:\n\nN = 32\nC = ""[ 1 1 -1 -1 ]\n" FontName "helvetica" FontSize 12 FontWeight "bold" } Annotation { Position [813, 90] Text "TESTING MODEL FOR\n\ninterleavers\nmodulation\n""channel \nrake receiver\ndemodulation\ndeinterleavers" FontName "helvetica" FontSize 14 FontWeight "bold" } }}
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