📄 periph.lst
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238 //-----------------------------------------------------------------------------
239 bit ChkErr()
240 {
C51 COMPILER V7.50 PERIPH 10/12/2007 17:05:45 PAGE 5
241 1 if (bErr==0) { dataTransferLen=0; return USBS_PASSED; }
242 1 else dataTransferLen = (DWORD)gSectorcount<<9;
243 1 if (directionIn)
244 1 {
245 2 nCopyBlock(); // Correct ECC and remap the block
246 2 while( !(P_EP4CS & bmEPEMPTY) ); // stall on the Status
247 2 P_EP4CS = bmEPSTALL;
248 2 }
249 1 return USBS_FAILED;
250 1 }
251
252 //-----------------------------------------------------------------------------
253 // Stalls EP2OUT endpoint.
254 //-----------------------------------------------------------------------------
255 void stallEP2OUT()
256 {
257 1 // Check to see if stall is needed. If it is, STALL the endpoint.
258 1 // After we have set the STALL, make sure we didn't get the last packet while we were STALLing.
259 1 WORD xdata x;
260 1
261 1 if (EP2468STAT & bmEP2EMPTY)
262 1 x = 0;
263 1 else
264 1 x = EP2FIFOBCL + (EP2FIFOBCH << 8) + EP2BC;
265 1
266 1 // Round up to allow for odd xfer lengths
267 1 // if (dataTransferLen > ((x + 1) & 0xfffe))
268 1 if (dataTransferLen > x)
269 1 {
270 2 P_EP2CS |= bmEPSTALL;
271 2
272 2 EZUSB_Delay(100);
273 2
274 2 if (P_EP2CS & bmEPSTALL)
275 2 x=1234;
276 2
277 2 // If the host has already cleared the STALL, the EP will be empty here, but we will drop safely thr
-ough the if()
278 2 if (EP2468STAT & bmEP2EMPTY)
279 2 x = 0;
280 2 else
281 2 x = EP2FIFOBCL + (EP2FIFOBCH << 8) + EP2BC;
282 2
283 2 if (dataTransferLen > x)
284 2 {
285 3 ResetAndArmEp2(); // Stall no longer needed
286 3 P_EP2CS = 0; // Clear stall bit
287 3 }
288 2 }
289 1 }
290
291 //-----------------------------------------------------------------------------
292 //-----------------------------------------------------------------------------
293 void sendUSBS(BYTE passOrFail)
294 {
295 1 while ( ((P_EP4CS & (bmEPFULL|bmEPSTALL) ) ) ); // Wait for an available buffer
296 1
297 1 ResetAndArmEp2();
298 1
299 1 // Fill the buffer & send the data back to the host
300 1 AUTOPTRL2 = LSB(EP4FIFOBUF);
301 1 P_XAUTODAT2 = 'U'; // Believe it or not, this is pretty efficient!
C51 COMPILER V7.50 PERIPH 10/12/2007 17:05:45 PAGE 6
302 1 P_XAUTODAT2 = 'S';
303 1 P_XAUTODAT2 = 'B';
304 1 P_XAUTODAT2 = 'S';
305 1 P_XAUTODAT2 = MSB(cbwTagLow);
306 1 P_XAUTODAT2 = LSB(cbwTagLow);
307 1 P_XAUTODAT2 = MSB(cbwTagHi);
308 1 P_XAUTODAT2 = LSB(cbwTagHi);
309 1
310 1 // have to store LSB first
311 1 P_XAUTODAT2 = ((BYTE *)&dataTransferLen)[3]; // "Residue"
312 1 P_XAUTODAT2 = ((BYTE *)&dataTransferLen)[2]; // "Residue"
313 1 P_XAUTODAT2 = ((BYTE *)&dataTransferLen)[1]; // "Residue"
314 1 P_XAUTODAT2 = ((BYTE *)&dataTransferLen)[0]; // "Residue"
315 1
316 1 P_XAUTODAT2 = passOrFail; // Status
317 1 EP4BCH = 0;
318 1 EP4BCL = 13;
319 1
320 1 // Stall the IN endpoint if we're in phase error state.
321 1 if (phaseErrorState)
322 1 {
323 2 while( !(P_EP4CS & bmEPEMPTY) )
324 2 ;
325 2 P_EP4CS = bmEPSTALL;
326 2 }
327 1 }
328
329 //-----------------------------------------------------------------------------
330 //-----------------------------------------------------------------------------
331 void failedIn()
332 {
333 1 // Stall if the host is still expecting data. Make sure
334 1 // endpoint is empty before doing the stall.
335 1 if (dataTransferLen)
336 1 {
337 2 if (!bShortPacketSent && SHORT_PACKET_BEFORE_STALL)
338 2 {
339 3 while( !(P_EP4CS & bmEPEMPTY) )
340 3 ;
341 3 EP4BCH = 0; // Terminate with NULL packet, then STALL. This
342 3 EP4BCL = 0; // addresses an issue with the current EHCI driver (1/02)
343 3 }
344 2
345 2 while( !(P_EP4CS & bmEPEMPTY) )
346 2 ;
347 2
348 2 P_EP4CS = bmEPSTALL;
349 2 }
350 1 }
351
352 //-----------------------------------------------------------------------------
353 //-----------------------------------------------------------------------------
354 void mymemmovexx(BYTE xdata * dest, BYTE xdata * src, WORD len)
355 {
356 1 AUTOPTR1H = MSB(dest);
357 1 AUTOPTR1L = LSB(dest);
358 1
359 1 while (len--)
360 1 P_XAUTODAT1 = *src++;
361 1 }
362
363 //-----------------------------------------------------------------------------
C51 COMPILER V7.50 PERIPH 10/12/2007 17:05:45 PAGE 7
364 // USB Interrupt Handlers
365 // The following functions are called by the USB interrupt jump table.
366 //-----------------------------------------------------------------------------
367 // Setup Data Available Interrupt Handler
368 void ISR_Sudav(void) interrupt 0
369 {
370 1 EZUSB_IRQ_CLEAR();
371 1 INT2CLR = bmSUDAV; // Clear SUDAV IRQ
372 1 SetupCommand();
373 1 }
374
375 //-----------------------------------------------------------------------------
376 //-----------------------------------------------------------------------------
377 void ISR_Ures(void) interrupt 0
378 {
379 1 // whenever we get a USB reset, we should revert to full speed mode
380 1 wPacketSize = FS_BULK_PACKET_SIZE;
381 1
382 1 EP4AUTOINLENH = MSB(wPacketSize);
383 1 EP4AUTOINLENL = LSB(wPacketSize);
384 1 P_FIFORESET = 0x04;
385 1
386 1 ResetAndArmEp2();
387 1 // clear the stall and busy bits that may be set
388 1 P_EP2CS = 0; // set EP2OUT to empty and clear stall
389 1 P_EP4CS = 0; // set EP4IN to empty and clear stall
390 1
391 1 // Initialize USB variables to make chapter 9 happy
392 1 AlternateSetting = Configuration = 0;
393 1
394 1 EZUSB_IRQ_CLEAR();
395 1 INT2CLR = bmURES; // Clear URES IRQ
396 1
397 1 if (currentState != UNCONFIGURED)
398 1 {
399 2 EA = 0;
400 2 // force a soft reset after the iret.
401 2 softReset();
402 2 }
403 1
404 1 }
405
406 //-----------------------------------------------------------------------------
407 // Timer ISR -- Cannot be placed with the other ISRs because we want the
408 // compiler to generate the vector.
409 //-----------------------------------------------------------------------------
410 void ISRtimer0() interrupt 1
411 {
412 1 }
413
414 //-----------------------------------------------------------------------------
415 //-----------------------------------------------------------------------------
416 void ISR_Susp(void) interrupt 0
417 {
418 1 Sleep = TRUE;
419 1 EZUSB_IRQ_CLEAR();
420 1 INT2CLR = bmSUSP;
421 1 }
422
423
424 //-----------------------------------------------------------------------------
425 //-----------------------------------------------------------------------------
C51 COMPILER V7.50 PERIPH 10/12/2007 17:05:45 PAGE 8
426 void ISR_Highspeed(void) interrupt 0
427 {
428 1 if (EZUSB_HIGHSPEED())
429 1 wPacketSize = HS_BULK_PACKET_SIZE;
430 1
431 1 EP4AUTOINLENH = MSB(wPacketSize);
432 1 EP4AUTOINLENL = LSB(wPacketSize);
433 1 EZUSB_IRQ_CLEAR();
434 1 INT2CLR = bmHSGRANT;
435 1 }
436
437
438 //-----------------------------------------------------------------------------
439 //-----------------------------------------------------------------------------
440 void ResetAndArmEp2()
441 {
442 1 // adjust stretch to allow for synchronization delay. We are about
443 1 // to do several back to back writes to registers that require a
444 1 // synchroniztion delay. Increasing stretch allows us to meet
445 1 // the delay requirement. See "Synchroniztion Delay" in the Technical
446 1 // Reference Manual for more information
447 1
448 1 P_FIFORESET = 2;
449 1 // we're double-buffered, so we need to arm EP2 two times
450 1 P_OUTPKTEND = 0x82;
451 1 // Reset the stretch to 0
452 1 _nop_(); // this delay is good enough, need only 1 nop
453 1 P_OUTPKTEND = 0x82;
454 1
455 1 EP2BCL = 0x80;
456 1 _nop_();
457 1 EP2BCL = 0x80;
458 1
459 1 }
460
461
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 1345 ----
CONSTANT SIZE = ---- ----
XDATA SIZE = ---- 3
PDATA SIZE = ---- ----
DATA SIZE = ---- 3
IDATA SIZE = ---- ----
BIT SIZE = ---- ----
EDATA SIZE = ---- ----
HDATA SIZE = ---- ----
XDATA CONST SIZE = ---- ----
FAR CONST SIZE = ---- ----
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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