📄 globals.c
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//-----------------------------------------------------------------------------
// File: globals.c
// Contents: contains all the global variables used by the firmware
//
// Format: indent 3. NO TABS!
//
//--------------------------------------------------------------------------
#include "globals.h"
BYTE AlternateSetting; // Alternate settings
BYTE Configuration; // Current configuration
WORD wPacketSize;
xdata volatile BYTE halfKBuffer[BUFFER_SIZE] _at_ 0xE000;
// Content of halfKBuffer:
// 0x000 - 0x100: copy of the dscr.a51
// 0x100 - 0x11F: SCSI Inquiry string
// 0x120 - 0x14F: USB String Descriptor-Index 0
// 0x150 - 0x17F: USB String Descriptor-Manufacturer - Index 1
// 0x180 - 0x1AF: USB String Descriptor-Product - Index 2
// 0x1B0 - 0x1DF: USB String Descriptor-Serial Number - Index 3
// 0x1E0 - 0x1FF: Reserved area for debug
WORD xdata cbwTagLow; // Tag from the most recent CBW packet
WORD xdata cbwTagHi;
DWORD xdata dataTransferLen;
bit currentState;
bit directionIn;
bit phaseErrorState;
bit bShortPacketSent;
bit Sleep;
#ifdef USE_2LUN
bit bLUN1;
#endif
DWORD dwLBA; // This is global to help the optimizer
//sbit bLBA0 = dwLBA ^ 24; // bit0 of dwLBA
BYTE bdata NandCfg; // bit0=cache read, bit1=prog cache, bit2=30ns/50ns
BYTE bdata FwCfg; // bit0=WriteProtec, bit1=ECC enable
sbit b30nsCycle = NandCfg ^ 2;
sbit bInternalMove = NandCfg ^ 4;
sbit bSoftErr = NandCfg ^ 5;
sbit bWriteProtectEnable = FwCfg ^ 0;
sbit bECCEnable = FwCfg ^ 1;
sbit bInterLeave = FwCfg ^ 2;
sbit bMsk = FwCfg ^ 7;
// the bit global variables
BYTE bdata gNandBits;
sbit bNeedErase = gNandBits ^ 0;
sbit bCnt = gNandBits ^ 1;
sbit bReload = gNandBits ^ 2;
sbit bFreeFound = gNandBits ^ 3;
sbit bEject = gNandBits ^ 4;
sbit b2BitErr = gNandBits ^ 5;
sbit bErr = gNandBits ^ 6;
sbit bFreeBlk = gNandBits ^ 7;
/////////////////////////////////////////////////////////////////////////////////////////
// NAND flash definitions
//
// gBank -- Represents a physical NAND chip select. A physical NAND package may have one or two
// chip selects, therefore, one or two banks.
// gCurZone -- Largest structure within the flash. Each zone contains 1024 physical blocks
// and 1000 logical blocks.
// gZones -- Total number of Zones in a NAND Flash
//
// gLog2Phy -- Table that maps the LBA received from the host into a physical address in the NAND.
// This table contains the physical address. It is indexed by the LBA.
// A value of FFFF means that the LBA does not have a physical address yet.
// This table is stored in the redundant area of the flash, one LBA per block.
/////////////////////////////////////////////////////////////////////////////////////////
//
// 128KByte flash chips with 512 byte pages have
// 512 bytes per page, 32 pages per block for 16K blocks * 8 zones
// 2K pages have
// 2K bytes/page, 64 pages/block for 64K blocks * 2 zones
//
// Zone = 1024 blocks (1000 LBAs)
// /---------/---------/---------/---------/---------/---------/|
// /---------/---------/---------/---------/---------/---------/||
// /---------/---------/---------/---------/---------/---------/|||
// |---------|---------|---------|---------|---------|---------|||||
// | | | | | | ||||/
// Block| Page | Page | Page | Page | Page | Page |||/
// | | | | | | ||/
// |---------|---------|---------|---------|---------|---------|/
//
DWORD gDriveCapacity;
WORD gSectorcount;
BYTE xdata gBank; // nand bank
bit bWPSwitchState; // Used to detect changes in the WP switch state
bit bNand2k;
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