📄 mb89201.h
字号:
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _RC0 :1;
IO_BYTE _RC1 :1;
IO_BYTE _RC2 :1;
IO_BYTE _CS0 :1;
IO_BYTE _CS1 :1;
IO_BYTE _CR :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
struct{
IO_BYTE _RC :3;
IO_BYTE _CS :2;
}bitc;
}SRCSTR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _RD8RP :1;
IO_BYTE _TD8TP :1;
IO_BYTE :1;
IO_BYTE _RIE :1;
IO_BYTE _TIE :1;
IO_BYTE _TDRE :1;
IO_BYTE _ORFE :1;
IO_BYTE _RDRF :1;
}bit;
}SSDSTR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _PR0 :1;
IO_BYTE _PR1 :1;
IO_BYTE _PR2 :1;
IO_BYTE _PREN :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
struct{
IO_BYTE _PR :3;
}bitc;
}UPCSTR;
typedef union{ /* ADC */
IO_BYTE byte;
struct{
IO_BYTE _AD :1;
IO_BYTE :1;
IO_BYTE _ADMV :1;
IO_BYTE _ADI :1;
IO_BYTE _ANS0 :1;
IO_BYTE _ANS1 :1;
IO_BYTE _ANS2 :1;
IO_BYTE :1;
}bit;
struct{
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE _ANS :3;
}bitc;
}ADC1STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE :1;
IO_BYTE _EXT :1;
IO_BYTE :1;
IO_BYTE _ADIE :1;
IO_BYTE _ADCK :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}ADC2STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _ADE0 :1;
IO_BYTE _ADE1 :1;
IO_BYTE _ADE2 :1;
IO_BYTE _ADE3 :1;
IO_BYTE _ADE4 :1;
IO_BYTE _ADE5 :1;
IO_BYTE _ADE6 :1;
IO_BYTE _ADE7 :1;
}bit;
}ADENSTR;
typedef union{ /* external interrupt - level */
IO_BYTE byte;
struct{
IO_BYTE _IE20 :1;
IO_BYTE _IE21 :1;
IO_BYTE _IE22 :1;
IO_BYTE _IE23 :1;
IO_BYTE _IE24 :1;
IO_BYTE _IE25 :1;
IO_BYTE _IE26 :1;
IO_BYTE _IE27 :1;
}bit;
}EIE2STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _IF20 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}EIF2STR;
typedef union{ /* SIO */
IO_BYTE byte;
struct{
IO_BYTE _SST :1;
IO_BYTE _BDS :1;
IO_BYTE _CKS0 :1;
IO_BYTE _CKS1 :1;
IO_BYTE _SOE :1;
IO_BYTE _SCKE :1;
IO_BYTE _SIOE :1;
IO_BYTE _SIOF :1;
}bit;
struct{
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE _CKS :2;
}bitc;
}SMRSTR;
typedef union{ /* UART/SIO Switch Register */
IO_BYTE byte;
struct{
IO_BYTE _SSEL :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}SSELSTR;
typedef union{ /* Wild Register Function */
IO_BYTE byte;
struct{
IO_BYTE _RA08 :1;
IO_BYTE _RA09 :1;
IO_BYTE _RA10 :1;
IO_BYTE _RA11 :1;
IO_BYTE _RA12 :1;
IO_BYTE _RA13 :1;
IO_BYTE _RA14 :1;
IO_BYTE _RA15 :1;
}bit;
}WRARH0STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _RA00 :1;
IO_BYTE _RA01 :1;
IO_BYTE _RA02 :1;
IO_BYTE _RA03 :1;
IO_BYTE _RA04 :1;
IO_BYTE _RA05 :1;
IO_BYTE _RA06 :1;
IO_BYTE _RA07 :1;
}bit;
}WRARL0STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _RD00 :1;
IO_BYTE _RD01 :1;
IO_BYTE _RD02 :1;
IO_BYTE _RD03 :1;
IO_BYTE _RD04 :1;
IO_BYTE _RD05 :1;
IO_BYTE _RD06 :1;
IO_BYTE _RD07 :1;
}bit;
}WRDR0STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _RA08 :1;
IO_BYTE _RA09 :1;
IO_BYTE _RA10 :1;
IO_BYTE _RA11 :1;
IO_BYTE _RA12 :1;
IO_BYTE _RA13 :1;
IO_BYTE _RA14 :1;
IO_BYTE _RA15 :1;
}bit;
}WRARH1STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _RA00 :1;
IO_BYTE _RA01 :1;
IO_BYTE _RA02 :1;
IO_BYTE _RA03 :1;
IO_BYTE _RA04 :1;
IO_BYTE _RA05 :1;
IO_BYTE _RA06 :1;
IO_BYTE _RA07 :1;
}bit;
}WRARL1STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _RD00 :1;
IO_BYTE _RD01 :1;
IO_BYTE _RD02 :1;
IO_BYTE _RD03 :1;
IO_BYTE _RD04 :1;
IO_BYTE _RD05 :1;
IO_BYTE _RD06 :1;
IO_BYTE _RD07 :1;
}bit;
}WRDR1STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _EN00 :1;
IO_BYTE _EN01 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}WRENSTR;
typedef union{ /* Port Data/Direction Registers Port 6+7 */
IO_BYTE byte;
struct{
IO_BYTE _P60 :1;
IO_BYTE _P61 :1;
IO_BYTE _P62 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}PDR6STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _D60 :1;
IO_BYTE _D61 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}DDR6STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _PUL60 :1;
IO_BYTE _PUL61 :1;
IO_BYTE _PUL62 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}PUL6STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _P70 :1;
IO_BYTE _P71 :1;
IO_BYTE _P72 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}PDR7STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _D70 :1;
IO_BYTE _D71 :1;
IO_BYTE _D72 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}DDR7STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _PUL70 :1;
IO_BYTE _PUL71 :1;
IO_BYTE _PUL72 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}PUL7STR;
typedef union{ /* Pull-Up Setting Registers */
IO_BYTE byte;
struct{
IO_BYTE _PUL00 :1;
IO_BYTE _PUL01 :1;
IO_BYTE _PUL02 :1;
IO_BYTE _PUL03 :1;
IO_BYTE _PUL04 :1;
IO_BYTE _PUL05 :1;
IO_BYTE _PUL06 :1;
IO_BYTE _PUL07 :1;
}bit;
}PUL0STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _PUL30 :1;
IO_BYTE _PUL31 :1;
IO_BYTE _PUL32 :1;
IO_BYTE _PUL33 :1;
IO_BYTE _PUL34 :1;
IO_BYTE _PUL35 :1;
IO_BYTE _PUL36 :1;
IO_BYTE _PUL37 :1;
}bit;
}PUL3STR;
typedef union{
IO_BYTE byte;
struct{
IO_BYTE _PUL50 :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
}bit;
}PUL5STR;
typedef union{ /* Flash Memory Control Status Register */
IO_BYTE byte;
struct{
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE :1;
IO_BYTE _RDY :1;
IO_BYTE _WE :1;
IO_BYTE _RDYINT :1;
IO_BYTE _INTE :1;
}bit;
}FMCSSTR;
/* C-DECLARATIONS */
extern __io PDR0STR pdr0; /* Port Data/Direction Registers Port 0 */
#define PDR0 pdr0.byte
#define PDR0_P00 pdr0.bit._P00
#define PDR0_P01 pdr0.bit._P01
#define PDR0_P02 pdr0.bit._P02
#define PDR0_P03 pdr0.bit._P03
#define PDR0_P04 pdr0.bit._P04
#define PDR0_P05 pdr0.bit._P05
#define PDR0_P06 pdr0.bit._P06
#define PDR0_P07 pdr0.bit._P07
extern __io DDR0STR ddr0;
#define DDR0 ddr0.byte
#define DDR0_D00 ddr0.bit._D00
#define DDR0_D01 ddr0.bit._D01
#define DDR0_D02 ddr0.bit._D02
#define DDR0_D03 ddr0.bit._D03
#define DDR0_D04 ddr0.bit._D04
#define DDR0_D05 ddr0.bit._D05
#define DDR0_D06 ddr0.bit._D06
#define DDR0_D07 ddr0.bit._D07
extern __io SYCCSTR sycc; /* Clock Control Registers */
#define SYCC sycc.byte
#define SYCC_CS0 sycc.bit._CS0
#define SYCC_CS1 sycc.bit._CS1
#define SYCC_WT0 sycc.bit._WT0
#define SYCC_WT1 sycc.bit._WT1
#define SYCC_SCM sycc.bit._SCM
#define SYCC_CS sycc.bitc._CS
#define SYCC_WT sycc.bitc._WT
extern __io STBCSTR stbc;
#define STBC stbc.byte
#define STBC_RST stbc.bit._RST
#define STBC_SPL stbc.bit._SPL
#define STBC_SLP stbc.bit._SLP
#define STBC_STP stbc.bit._STP
extern __io WDTCSTR wdtc;
#define WDTC wdtc.byte
#define WDTC_WTE0 wdtc.bit._WTE0
#define WDTC_WTE1 wdtc.bit._WTE1
#define WDTC_WTE2 wdtc.bit._WTE2
#define WDTC_WTE3 wdtc.bit._WTE3
#define WDTC_WTE wdtc.bitc._WTE
extern __io TBTCSTR tbtc;
#define TBTC tbtc.byte
#define TBTC_TBR tbtc.bit._TBR
#define TBTC_TBC0 tbtc.bit._TBC0
#define TBTC_TBC1 tbtc.bit._TBC1
#define TBTC_TBIE tbtc.bit._TBIE
#define TBTC_TBOF tbtc.bit._TBOF
#define TBTC_TBC tbtc.bitc._TBC
extern __io PDR3STR pdr3; /* Port Data/Direction Registers Port 3 */
#define PDR3 pdr3.byte
#define PDR3_P30 pdr3.bit._P30
#define PDR3_P31 pdr3.bit._P31
#define PDR3_P32 pdr3.bit._P32
#define PDR3_P33 pdr3.bit._P33
#define PDR3_P34 pdr3.bit._P34
#define PDR3_P35 pdr3.bit._P35
#define PDR3_P36 pdr3.bit._P36
#define PDR3_P37 pdr3.bit._P37
extern __io DDR3STR ddr3;
#define DDR3 ddr3.byte
#define DDR3_D30 ddr3.bit._D30
#define DDR3_D31 ddr3.bit._D31
#define DDR3_D32 ddr3.bit._D32
#define DDR3_D33 ddr3.bit._D33
#define DDR3_D34 ddr3.bit._D34
#define DDR3_D35 ddr3.bit._D35
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -