mb89201.h

单片机

/*  FFMC-8L IO-MAP HEADER FILE      */
/*  ==========================      */
/* SOFTUNE WORKBENCH FORMAT         */
/* C-DEFINITIONS FOR IO-SYMBOLS     */
/* CREATED BY IO-WIZARD V2.16    */
/* *********************************************************** */
/*               FUJITSU MICROELEKTRONICS EUROPE GMBH                  */
/*               Am Siebenstein 6-10, 63303 Dreieich           */
/*               Tel.:++49/6103/690-0,Fax - 122                */
/*                                                             */
/* The following software is for demonstration purposes only.  */
/* It is not fully tested, nor validated in order to fullfill  */
/* its task under all circumstances. Therefore, this software  */
/* or any part of it must only be used in an evaluation        */
/* laboratory environment.                                     */
/* This software is subject to the rules of our standard       */
/* DISCLAIMER, that is delivered with our SW-tools (on the CD  */
/* "Micros Documentation & Software V3.0" see "\START.HTM" or  */
/* see our Internet Page -                                     */
/* http://www.fujitsu-ede.com/products/micro/disclaimer.html   */
/* *********************************************************** */


#ifndef __MB89XXX
#define __MB89XXX

typedef unsigned char		IO_BYTE;
typedef unsigned short		IO_WORD;
typedef unsigned long		IO_LWORD;
typedef const unsigned short	IO_WORD_READ;

/* REGISTER BIT STRUCTURES */

typedef union{   /*  Port Data/Direction Registers Port 0 */
    IO_BYTE	byte;
    struct{
    IO_BYTE _P00 :1;
    IO_BYTE _P01 :1;
    IO_BYTE _P02 :1;
    IO_BYTE _P03 :1;
    IO_BYTE _P04 :1;
    IO_BYTE _P05 :1;
    IO_BYTE _P06 :1;
    IO_BYTE _P07 :1;
  }bit;
 }PDR0STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _D00 :1;
    IO_BYTE _D01 :1;
    IO_BYTE _D02 :1;
    IO_BYTE _D03 :1;
    IO_BYTE _D04 :1;
    IO_BYTE _D05 :1;
    IO_BYTE _D06 :1;
    IO_BYTE _D07 :1;
  }bit;
 }DDR0STR;
typedef union{   /*  Clock Control Registers */
    IO_BYTE	byte;
    struct{
    IO_BYTE _CS0 :1;
    IO_BYTE _CS1 :1;
    IO_BYTE  :1;
    IO_BYTE _WT0 :1;
    IO_BYTE _WT1 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE _SCM :1;
  }bit;
  struct{
    IO_BYTE _CS :2;
    IO_BYTE :1;
    IO_BYTE _WT :2;
  }bitc;
 }SYCCSTR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE _RST :1;
    IO_BYTE _SPL :1;
    IO_BYTE _SLP :1;
    IO_BYTE _STP :1;
  }bit;
 }STBCSTR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _WTE0 :1;
    IO_BYTE _WTE1 :1;
    IO_BYTE _WTE2 :1;
    IO_BYTE _WTE3 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
  struct{
    IO_BYTE _WTE :4;
  }bitc;
 }WDTCSTR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _TBR :1;
    IO_BYTE _TBC0 :1;
    IO_BYTE _TBC1 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE _TBIE :1;
    IO_BYTE _TBOF :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE _TBC :2;
  }bitc;
 }TBTCSTR;
typedef union{   /*  Port Data/Direction Registers Port 3 */
    IO_BYTE	byte;
    struct{
    IO_BYTE _P30 :1;
    IO_BYTE _P31 :1;
    IO_BYTE _P32 :1;
    IO_BYTE _P33 :1;
    IO_BYTE _P34 :1;
    IO_BYTE _P35 :1;
    IO_BYTE _P36 :1;
    IO_BYTE _P37 :1;
  }bit;
 }PDR3STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _D30 :1;
    IO_BYTE _D31 :1;
    IO_BYTE _D32 :1;
    IO_BYTE _D33 :1;
    IO_BYTE _D34 :1;
    IO_BYTE _D35 :1;
    IO_BYTE _D36 :1;
    IO_BYTE _D37 :1;
  }bit;
 }DDR3STR;
typedef union{   /*  Reset Flag Register */
    IO_BYTE	byte;
    struct{
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE _SFTR :1;
    IO_BYTE _WDOG :1;
    IO_BYTE _ERST :1;
    IO_BYTE _PONR :1;
  }bit;
 }RSFRSTR;
typedef union{   /*  Port Data/Direction Registers Port 4+5 */
    IO_BYTE	byte;
    struct{
    IO_BYTE _P40 :1;
    IO_BYTE _P41 :1;
    IO_BYTE _P42 :1;
    IO_BYTE _P43 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
 }PDR4STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _D40 :1;
    IO_BYTE _D41 :1;
    IO_BYTE _D42 :1;
    IO_BYTE _D43 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
 }DDR4STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _OUT40 :1;
    IO_BYTE _OUT41 :1;
    IO_BYTE _OUT42 :1;
    IO_BYTE _OUT43 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
 }OUT4STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _P50 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
 }PDR5STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _D50 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
 }DDR5STR;
typedef union{   /*  12bit PPG */
    IO_BYTE	byte;
    struct{
    IO_BYTE _HSC0 :1;
    IO_BYTE _HSC1 :1;
    IO_BYTE _HSC2 :1;
    IO_BYTE _HSC3 :1;
    IO_BYTE _HSC4 :1;
    IO_BYTE _HSC5 :1;
    IO_BYTE _RCK0 :1;
    IO_BYTE _RCK1 :1;
  }bit;
  struct{
    IO_BYTE _HSC :6;
    IO_BYTE _RCK :2;
  }bitc;
 }RCR21STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _HSC6 :1;
    IO_BYTE _HSC7 :1;
    IO_BYTE _HSC8 :1;
    IO_BYTE _HSC9 :1;
    IO_BYTE _HSC10 :1;
    IO_BYTE _HSC11 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
  struct{
    IO_BYTE _HSC :6;
  }bitc;
 }RCR22STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _SCL0 :1;
    IO_BYTE _SCL1 :1;
    IO_BYTE _SCL2 :1;
    IO_BYTE _SCL3 :1;
    IO_BYTE _SCL4 :1;
    IO_BYTE _SCL5 :1;
    IO_BYTE  :1;
    IO_BYTE _RCEN :1;
  }bit;
  struct{
    IO_BYTE _SCL :6;
  }bitc;
 }RCR23STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _SCL6 :1;
    IO_BYTE _SCL7 :1;
    IO_BYTE _SCL8 :1;
    IO_BYTE _SCL9 :1;
    IO_BYTE _SCL10 :1;
    IO_BYTE _SCL11 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
  struct{
    IO_BYTE _SCL :6;
  }bitc;
 }RCR24STR;
typedef union{   /*  Buzzer Register */
    IO_BYTE	byte;
    struct{
    IO_BYTE _BZ0 :1;
    IO_BYTE _BZ1 :1;
    IO_BYTE _BZ2 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
  struct{
    IO_BYTE _BZ :3;
  }bitc;
 }BZCRSTR;
typedef union{   /*  Timer and Capture */
    IO_BYTE	byte;
    struct{
    IO_BYTE  :1;
    IO_BYTE _EDGS0 :1;
    IO_BYTE _EDGS1 :1;
    IO_BYTE _TCMSK :1;
    IO_BYTE _CCMSK :1;
    IO_BYTE _CPIEN :1;
    IO_BYTE _CFCLR :1;
    IO_BYTE _CPIF :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE _EDGS :2;
  }bitc;
 }TCCRSTR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _TSTR1 :1;
    IO_BYTE _TCS10 :1;
    IO_BYTE _TCS11 :1;
    IO_BYTE _TCS12 :1;
    IO_BYTE  :1;
    IO_BYTE _T1IEN :1;
    IO_BYTE _TFCR1 :1;
    IO_BYTE _TIF1 :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE _TCS1 :3;
  }bitc;
 }TCR1STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _TSTR0 :1;
    IO_BYTE _TCS00 :1;
    IO_BYTE _TCS01 :1;
    IO_BYTE _TCS02 :1;
    IO_BYTE _CINV :1;
    IO_BYTE _T0IEN :1;
    IO_BYTE _TFCR0 :1;
    IO_BYTE _TIF0 :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE _TCS0 :3;
  }bitc;
 }TCR0STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _TSEL :1;
    IO_BYTE _PEN :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
 }TCR2STR;
typedef union{   /*  PWM Register */
    IO_BYTE	byte;
    struct{
    IO_BYTE _TIE :1;
    IO_BYTE _OE :1;
    IO_BYTE _TIR :1;
    IO_BYTE _TPE :1;
    IO_BYTE _P0 :1;
    IO_BYTE _P1 :1;
    IO_BYTE  :1;
    IO_BYTE _PTX :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE :1;
    IO_BYTE :1;
    IO_BYTE :1;
    IO_BYTE _P :2;
  }bitc;
 }CNTRSTR;
typedef union{   /*  external interrupt - edge */
    IO_BYTE	byte;
    struct{
    IO_BYTE _EIE0 :1;
    IO_BYTE _SL00 :1;
    IO_BYTE _SL01 :1;
    IO_BYTE _EIR0 :1;
    IO_BYTE _EIE1 :1;
    IO_BYTE _SL10 :1;
    IO_BYTE _SL11 :1;
    IO_BYTE _EIR1 :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE _SL0 :2;
    IO_BYTE :1;
    IO_BYTE :1;
    IO_BYTE _SL1 :2;
  }bitc;
 }EIC1STR;
typedef union{  
    IO_BYTE	byte;
    struct{
    IO_BYTE _EIE2 :1;
    IO_BYTE _SL20 :1;
    IO_BYTE _SL21 :1;
    IO_BYTE _EIR2 :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
    IO_BYTE  :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE _SL2 :2;
  }bitc;
 }EIC2STR;
typedef union{   /*  UART */
    IO_BYTE	byte;
    struct{
    IO_BYTE _SOE :1;
    IO_BYTE _SCKE :1;
    IO_BYTE  :1;
    IO_BYTE _SMDE :1;
    IO_BYTE _MC0 :1;
    IO_BYTE _MC1 :1;
    IO_BYTE _SBL :1;
    IO_BYTE _PEN :1;
  }bit;
  struct{
    IO_BYTE :1;
    IO_BYTE :1;
    IO_BYTE :1;
    IO_BYTE :1;
    IO_BYTE _MC :2;
  }bitc;
 }SMCSTR;