ixp425.gyd

ixp425 cpld 源码

Pin Freeze File:  version D.19

;If you have made significant changes to your 7300 design and have trouble
;recreating the same pinout try disabling the FREEZE_OPTIMIZATION option.
;Removing the semicolon on the FREEZE_OPTIMIZATION line below disables this
;option.  FREEZE_OPTIMIZATION=OFF tells the optimization software to
;take account of the pin-assignments (e.g., apply different collapsing
;rules to logic assigned to fast-function blocks).
;Do NOT use this option when targeting a 9500 device.
;FREEZE_OPTIMIZATION: OFF
9572XL64 XC9572XL-10-VQ64
\$Net00051_ PIN6
\$Net00052_ PIN7
\$Net00021_ PIN11
\$Net00129_ PIN2
\$Net00019_ PIN22
\$Net00031_ PIN27
\$Net00030_ PIN25
\$Net00029_ PIN24
\$Net00049_ PIN1
\$Net00001_ PIN10
\$Net00079_ PIN63
\$Net00078_ PIN62
\$Net00003_ PIN32
\$Net00002_ PIN31
\$Net00073_ PIN61
\$Net00022_ PIN12
\$Net00016_ PIN8
\$Net00071_ PIN60
\$Net00080_ PIN64
\$Net00017_ PIN9


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_2 NRD_USB NCS_USB
PARTITION FB1_5 NWR_USB

PARTITION FB2_2 NRE_NAND
PARTITION FB2_5 NCE_NAND CLE_NAND
PARTITION FB2_8 ALE_NAND NWE_NAND

PARTITION FB3_3 GPIO9 GPIO10