em78x156xx.h

单片机类程序

/****************************************************
 *	Header file for the Elan 						*
 *	EM78P156E chip									*
 *	EM78P156N chip									*
 *  Title: EM78X156 include file					*
 *	Description: The Definition of EM78x156			*
 *				 Registers and Bits 				*
 *	Company: ELAN MICROELECTRONICS (SZ) LTD.		*
 *	Author:	HongXi.Tang								*
 *	Date: 10/05/2005								*
 *	Version: v1.0									*
 ****************************************************/
 
static unsigned int TCC     @0x01;
static unsigned int PC      @0x02;
static unsigned int STATUS  @0x03;
static unsigned int RSR     @0x04;
static unsigned int P5   @0x05;
static unsigned int P6   @0x06;
static unsigned int ISR	    @0x0F;
 
/*======================================================;
;  Special Purpose Registers Define                     ;
; ======================================================;
;
; A: Accumulator
; It can't be addressed.
;
; CONT: Control Register
;
     ;{                       
                              ; bit 7 not used
         mINT     ==  0x40    ; Interrupt enable flag
                              ; "0" : Masked by DISI or hardware interrupt
                              ; "1" : Enabled by ENI/RETI instructions
         mTS      ==  0x20    ; TCC signal source
                              ; "0" : Internal instruction cycle clock
                              ; "1" : Transition on TCC pin
         mTE      ==  0x10    ; TCC signal edge
                              ; "0" : Increment if the transition from low to high takes place on TCC pin
                              ; "1" : Increment if the transition from high to low takes place on TCC pin
         mPAB     ==  0x08    ; Prescaler assignment bit
                              ; "0" : Prescaler assign to TCC
                              ; "1" : Prescaler assign to WDT
         mPSR2    ==  0x04    ; TCC/WDT prescaler Select bit[2]
         mPSR1    ==  0x02    ; TCC/WDT prescaler Select bit[1]
         mPSR0    ==  0x01    ; TCC/WDT prescaler Select bit[0]
                              ; |------|------|------|----------|----------|
                              ; | PSR2 | PSR1 | PSR0 | TCC Rate | WDT Rate |
                              ; |------|------|------|----------|----------|
                              ; |  0   |  0   |  0   |   1:2    |   1:1    |
                              ; |  0   |  0   |  1   |   1:4    |   1:2    |
                              ; |  0   |  1   |  0   |   1:8    |   1:4    |
                              ; |  0   |  1   |  1   |   1:16   |   1:8    |
                              ; |  1   |  0   |  0   |   1:32   |   1:16   |
                              ; |  1   |  0   |  1   |   1:64   |   1:32   |
                              ; |  1   |  1   |  0   |   1:128  |   1:64   |
                              ; |  1   |  1   |  1   |   1:256  |   1:128  |
                              ; |------|------|------|----------|----------|
        ;}
;
*/
 
static io unsigned int P5CR 	@0x05:iopage 0;
static io unsigned int P6CR 	@0x06:iopage 0;
static io unsigned int PCR  	@0x0A:iopage 0;	//Prescaler Counter Register
static io unsigned int PDCR 	@0x0B:iopage 0;	//Push-down Control Register
static io unsigned int ODCR 	@0x0C:iopage 0;	//Open-drain Control Register
static io unsigned int PHCR 	@0x0D:iopage 0;	//Push-high Control Register
static io unsigned int WDTCR 	@0x0E:iopage 0;	//WDT Control Register
static io unsigned int IMR		@0x0F:iopage 0;	//Interrupt Mask Register
 
/*	STATUS bits	*/
static bit GP2 @0x03@7:rpage 0;	
static bit GP1 @0x03@6:rpage 0;
static bit GP0 @0x03@5:rpage 0;	//general purpose read/write bits
static bit T   @0x03@4:rpage 0;	//time-out bit
static bit P   @0x03@3:rpage 0;	//power down bit
static bit Z   @0x03@2:rpage 0;	///Zero flag
static bit DC  @0x03@1:rpage 0;	//Auxiliary carry bit
static bit C   @0x03@0:rpage 0;	//carry flag
 
/*	PORT5 bits	*/
static bit P5_3 @0x05@3:rpage 0;
static bit P5_2 @0x05@2:rpage 0;
static bit P5_1 @0x05@1:rpage 0;
static bit P5_0 @0x05@0:rpage 0;
 
/*	PORT6 bits	*/
static bit P6_7 @0x06@7:rpage 0;
static bit P6_6 @0x06@6:rpage 0;
static bit P6_5 @0x06@5:rpage 0;
static bit P6_4 @0x06@4:rpage 0;
static bit P6_3 @0x06@3:rpage 0;
static bit P6_2 @0x06@2:rpage 0;
static bit P6_1 @0x06@1:rpage 0;
static bit P6_0 @0x06@0:rpage 0;
  
/*	interrupt static register(RF)	*/
static bit EXIF @0x0F@2:rpage 0;	//External interrupt flag
static bit ICIF @0x0F@1:rpage 0;	//input status changed interrupt flag
static bit TCIF @0x0F@0:rpage 0;	//TCC overflowing interrupt flag