dsp28_sci.pp

能够实现PWM输出功能

extern cregister volatile unsigned int IFR;
extern cregister volatile unsigned int IER;










typedef int  		int16;
typedef long 		int32;
typedef unsigned int  	Uint16;
typedef unsigned long 	Uint32;





















 
extern void InitAdc(void);
extern void InitDevEmu(void);
extern void InitDevice(void);
extern void InitECana(void);
extern void InitEv(void);
extern void InitGpio(void);
extern void InitMcbsp(void);
extern void InitPieCtrl(void);
extern void InitPieVectTable(void);
extern void InitSci(void);
extern void InitSpi(void);
extern void InitSysCtrl(void);
extern void InitXintf(void);
extern void InitXIntrupt(void);

extern void KickDog(void);


                                      

























struct HISPCP_BITS  {   
   Uint16 HSPCLK:3;       
   Uint16 rsvd1:13;       
};

union HISPCP_REG {
   Uint16                all;
   struct HISPCP_BITS  bit;
};


struct LOSPCP_BITS  {   
   Uint16 LSPCLK:3;       
   Uint16 rsvd1:13;       
};

union LOSPCP_REG {
   Uint16                all;
   struct LOSPCP_BITS  bit;
};


struct PCLKCR_BITS  {   
   Uint16 EVAENCLK:1;     
   Uint16 EVBENCLK:1;     
   Uint16 rsvd1:1;        
   Uint16 ADCENCLK:1;     
   Uint16 rsvd2:4;        
   Uint16 SPIENCLK:1;     
   Uint16 rsvd3:1;        
   Uint16 SCIENCLKA:1;    
   Uint16 SCIENCLKB:1;    
   Uint16 MCBSPENCLK:1;   
   Uint16 rsvd4:1;        
   Uint16 ECANENCLK:1;    
};

union PCLKCR_REG {
   Uint16                all;
   struct PCLKCR_BITS  bit;
};   


struct SCSR_BITS {      
   Uint16 WDOVERRIDE:1;   
   Uint16 WDENINT:1;      
   Uint16 rsvd1:14;       
};

union SCSR_REG {
   Uint16              all;
   struct SCSR_BITS  bit;
};




struct SYS_CTRL_REGS {
   Uint16  rsvd1[10];            
   union HISPCP_REG HISPCP;      
   union LOSPCP_REG LOSPCP;      
   union PCLKCR_REG PCLKCR;      
   Uint16  rsvd2;                
   Uint16  LPMCR0;               
   Uint16  LPMCR1;               
   Uint16  rsvd3;                
   Uint16  PLLCR;                
   union SCSR_REG SCSR;          
   Uint16  WDCNTR;               
   Uint16  rsvd4;                
   Uint16  WDKEY;                
   Uint16  rsvd5[3];             
   Uint16  WDCR;                 
   Uint16  rsvd6[6];             
};


 
 
 
 

 
struct  CSMSCR_BITS {      
   Uint16     SECURE:1;    
   Uint16     rsvd1:14;    
   Uint16     FORCESEC:1;  

}; 

 
union CSMSCR_REG {
   Uint16       all;
   struct CSMSCR_BITS bit;
};

  
struct  CSM_REGS {      
   Uint16         KEY0;       
   Uint16         KEY1;       
   Uint16         KEY2;       
   Uint16         KEY3;       
   Uint16         KEY4;       
   Uint16         KEY5;       
   Uint16         KEY6;       
   Uint16         KEY7;       
   Uint16         rsvd1;      
   Uint16         rsvd2;      
   Uint16         rsvd3;      
   Uint16         rsvd4;      
   Uint16         rsvd5;      
   Uint16         rsvd6;      
   Uint16         rsvd7;      
   union CSMSCR_REG CSMSCR;     
};

 
struct  CSM_PWL {
   Uint16         PSWD0;      
   Uint16         PSWD1;      
   Uint16         PSWD2;      
   Uint16         PSWD3;      
   Uint16         PSWD4;      
   Uint16         PSWD5;      
   Uint16         PSWD6;      
   Uint16         PSWD7;      
};



 

 
struct  FOPT_BITS {             
   Uint16     ENPIPE:1;   
   Uint16     rsvd:15;    
};

 
union FOPT_REG {
   Uint16     all;
   struct FOPT_BITS bit;
};

 
struct  FPWR_BITS {             
   Uint16     PWR:2;      
   Uint16     rsvd:14;    
};

 
union FPWR_REG {
   Uint16     all;
   struct FPWR_BITS bit;
};


 
struct  FSTATUS_BITS {             
   Uint16     PWRS:2;        
   Uint16     STDBYWAITS:1;  
   Uint16     ACTIVEWAITS:1; 
   Uint16     rsvd1:4;       
   Uint16     V3STAT:1;      
   Uint16     rsvd2:7;       
};

 
union FSTATUS_REG {
   Uint16        all;
   struct FSTATUS_BITS bit;
};

 
struct  FSTDBYWAIT_BITS {          
   Uint16     STDBYWAIT:8;   
   Uint16     rsvd:8;        
};

 
union FSTDBYWAIT_REG {
   Uint16           all;
   struct FSTDBYWAIT_BITS bit;
};

 
struct  FACTIVEWAIT_BITS {         
   Uint16     ACTIVEWAIT:8;  
   Uint16     rsvd:8;        
};

 
union FACTIVEWAIT_REG {
   Uint16            all;
   struct FACTIVEWAIT_BITS bit;
};

 
struct  FBANKWAIT_BITS {           
   Uint16     RANDWAIT:4;    
   Uint16     rsvd1:4;       
   Uint16     PAGEWAIT:4;    
   Uint16     rsvd2:4;       
};

 
union FBANKWAIT_REG {
   Uint16          all;
   struct FBANKWAIT_BITS bit;
};

 
struct  FOTPWAIT_BITS {            
   Uint16     OPTWAIT:5;     
   Uint16     rsvd:11;       
};

 
union FOTPWAIT_REG {
   Uint16         all;
   struct FOTPWAIT_BITS bit;
};


struct FLASH_REGS {
   union FOPT_REG        FOPT;        
   Uint16 rsvd1;                      
   union FPWR_REG        FPWR;        
   union FSTATUS_REG     FSTATUS;     
   union FSTDBYWAIT_REG  FSTDBYWAIT;  
   union FACTIVEWAIT_REG FACTIVEWAIT; 
   union FBANKWAIT_REG   FBANKWAIT;   
   union FOTPWAIT_REG    FOTPWAIT;    
};




extern volatile struct SYS_CTRL_REGS SysCtrlRegs;
extern volatile struct CSM_REGS CsmRegs;
extern volatile struct CSM_PWL CsmPwl;
extern volatile struct FLASH_REGS FlashRegs;





























struct DEVICECNF_BITS  {   
   Uint16 rsvd1:3;           
   Uint16 VMAPS:1;           
   Uint16 rsvd2:1;           
   Uint16 XRSn:1;            
   Uint16 rsvd3:10;          
   Uint16 rsvd4:3;           
   Uint16 ENPROT:1;          
   Uint16 rsvd5:12;          
};

union DEVICECNF_REG {
   Uint32                all;
   struct DEVICECNF_BITS  bit;
};



struct DEVICEID_BITS  {    
   Uint16 PARTID:16;         
   Uint16 REVID:16;          
};

union DEVICEID_REG {
   Uint32                   all;
   struct DEVICEID_BITS  bit;
};

struct DEV_EMU_REGS {
   union DEVICECNF_REG DEVICECNF;
   union DEVICEID_REG DEVICEID;
   Uint16  PROTSTART;
   Uint16  PROTRANGE;
   Uint16 rsvd[202];
   Uint16 M0RAMDFT;
   Uint16 M1RAMDFT;
   Uint16 L0RAMDFT;
   Uint16 L1RAMDFT;
   Uint16 H0RAMDFT;
};




extern volatile struct DEV_EMU_REGS DevEmuRegs;









struct XTIMING_BITS {  
   Uint16 XWRTRAIL:2;    
   Uint16 XWRACTIVE:3;   
   Uint16 XWRLEAD:2;     
   Uint16 XRDTRAIL:2;    
   Uint16 XRDACTIVE:3;   
   Uint16 XRDLEAD:2;     
   Uint16 USEREADY:1;    
   Uint16 READYMODE:1;   
   Uint16 XSIZE:2;       
   Uint16 rsvd1:4;       
   Uint16 X2TIMING:1;    
   Uint16 rsvd3:9;       
};

union XTIMING_REG {
   Uint32                 all;
   struct XTIMING_BITS  bit;
};


struct XINTCNF2_BITS {  
   Uint16 WRBUFF:2;       
   Uint16 CLKMODE:1;      
   Uint16 CLKOFF:1;       
   Uint16 rsvd1:2;        
   Uint16 WLEVEL:2;       
   Uint16 MPNMC:1;        
   Uint16 HOLD:1;         
   Uint16 HOLDS:1;        
   Uint16 HOLDAS:1;       
   Uint16 rsvd2:4;        
   Uint16 XTIMCLK:3;      
   Uint16 rsvd3:13;       
};

union XINTCNF2_REG {
   Uint32                  all;
   struct XINTCNF2_BITS  bit;
};


struct XBANK_BITS {    
   Uint16  BANK:2;       
   Uint16  BCYC:3;       
   Uint16  rsvd:10;      
};

union XBANK_REG {
   Uint16               all;
   struct XBANK_BITS  bit;
};





struct XINTF_REGS {
   union XTIMING_REG XTIMING0;
   union XTIMING_REG XTIMING1;
   union XTIMING_REG XTIMING2;
   Uint32  rsvd1[3];
   union XTIMING_REG XTIMING6;
   union XTIMING_REG XTIMING7;
   Uint32  rsvd2[2];
   union XINTCNF2_REG XINTCNF2;
   Uint32  rsvd3;
   union XBANK_REG    XBANK;
   Uint16  rsvd4;
   Uint16  XREVISION;
   Uint16  rsvd5[5];
};




extern volatile struct XINTF_REGS XintfRegs;






























struct  TCR_BITS {        
   Uint16    OUTSTS:1;      
   Uint16    FORCE:1;       
   Uint16    POL:1;         
   Uint16    TOG:1;         
   Uint16    TSS:1;         
   Uint16    TRB:1;         
   Uint16    FRCEN:1;       
   Uint16    PWIDTH:3;      
   Uint16    SOFT:1;        
   Uint16    FREE:1;        
   Uint16    rsvd:2;        
   Uint16    TIE:1;         
   Uint16    TIF:1;         
}; 

union TCR_REG {
   Uint16             all;
   struct TCR_BITS  bit;
};


struct  TPR_BITS {        
   Uint16     TDDR:8;       
   Uint16     PSC:8;        
};

union TPR_REG {
   Uint16             all;
   struct TPR_BITS  bit;
};


struct  TPRH_BITS {       
   Uint16     TDDRH:8;      
   Uint16     PSCH:8;       
};

union TPRH_REG {
   Uint16             all;
   struct TPRH_BITS bit;
};


struct TIM_REG {
   Uint16  LSW;
   Uint16  MSW;
};

union TIM_GROUP {
   Uint32            all;
   struct TIM_REG  half;
};


struct PRD_REG {
   Uint16  LSW;
   Uint16  MSW;
};

union PRD_GROUP {
   Uint32            all;
   struct PRD_REG  half;
};




struct CPUTIMER_REGS {
   union TIM_GROUP TIM;   
   union PRD_GROUP PRD;   
   union TCR_REG  TCR;    
   Uint16  rsvd1;         
   union TPR_REG  TPR;    
   union TPRH_REG TPRH;   
};




struct CPUTIMER_VARS {
   volatile struct  CPUTIMER_REGS  *RegsAddr;
   Uint32    InterruptCount;
   float   CPUFreqInMHz;
   float   PeriodInUSec;
};




void InitCpuTimers(void);
void ConfigCpuTimer(struct CPUTIMER_VARS *Timer, float Freq, float Period);

extern volatile struct CPUTIMER_REGS CpuTimer0Regs;
extern volatile struct CPUTIMER_REGS CpuTimer1Regs;
extern volatile struct CPUTIMER_REGS CpuTimer2Regs;