tbpwmdaccode.s43

msp430单片机部分代码,,,msp430单片机部分代码

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NAME        PWMDAC
;****************************************************************************  
;  PWM DAC Demonstratin Program
;  Generate a 250Hz sine wave using PWM timer Timer_B.
;
;  Description: This program demonstrates the usage of a PWM timer together 
;  with external filters to implement a DAC.  The program shows how to
;  create a 250Hz sine wave, a 125Hz ramp, and a DC level with Timer_B.  
;  Timer_A could also be used in the same manner.  A sine table holds the 
;  sample values for the sinusoid.  To create the ramp, the PWM value is 
;  simply incremented. The DC level is created by storing charge on an
;  RC network using a PWM output to provide the charge.  The value of the DC
;  voltage directly corresponds to the duty cycele of the PWM signal.  After 
;  initialization, the CPU is put into LPM0.  It remains there until the
;  CCIFG0 interrupt from Timer_B wakes it up.  In the Timer_B ISR, the next 
;  value for the sinusoid is loaded into CCR1 and the ramp value is incremented
;  and loded into CCR2. Upon return form the ISR, the CPU goes back into LPM0.  
;
;  Mike Mitchell
;  MSP430 Applications
;  Texas Instruments, Inc
;  November, 2000
;
;****************************************************************************  
#include    "MSP430X14x.H"                  ; Include Standard Defs

Delta       EQU     250                     ; Delta = Target DCO/8192
                                            ; Target DCO frequency = 2.048MHz
                                            ; This value is used in the
                                            ; software FLL routine to 
                                            ; calibrate the DCO frequency
                                            ; using the 32768Hz oscillator
                                            ; as a reference.  For more
                                            ; information on stabilizing
                                            ; the DCO or the FLL routine
                                            ; see the application report
                                            ; titled "Controlling the DCO
                                            ; frequency of the MSP430x11x"
                                            ; Literature number SLAA074
;----------------------------------------------------------------------------- 
            RSEG    CODE                    
;----------------------------------------------------------------------------- 
Sine_Tab    DW      255                     ; Sine Table.  These are the count
            DW      254                     ; values in decimal that will
            DW      246                     ; go into TBCCR1 to change the
            DW      234                     ; PWM duty cycle.
            DW      219                     ; Must use words instead of bytes
            DW      199                     ; because must move words into
            DW      177                     ; TB registers.
            DW      153                     ; Don't use a '0' as a sample value
            DW      128                     ; The timer will glitch.
            DW      103
            DW      79 
            DW      57 
            DW      37 
            DW      22 
            DW      10           
            DW      2  
            DW      1
            DW      2 
            DW      10
            DW      22 
            DW      37 
            DW      57           
            DW      79 
            DW      103
            DW      128
            DW      153
            DW      177
            DW      199
            DW      219          
            DW      234
            DW      246          
            DW      255
;-----------------   Code Starts Here   --------------------------------------   
RESET       mov     #09FEh,SP               ; Initialize stackpointer

StopWDT     mov     #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT
            
SetupP4     bis.b   #00Eh,&P4SEL            ; Select TB1, TB2, TB3 instead of 
            bis.b   #00Eh,&P4DIR            ; P4.x, and set as outputs

SetupBC     mov.b   #0A6h,&BCSCTL1          ; ACLK is divided by 4. RSEL=6,
                                            ; no division for MCLK or SMCLK,
                                            ; DCO sources MCLK and SMCLK.
                                            ; XT2 is off.
                                            ; NOTE: To determine the value of 
                                            ; Rsel for a desired DCO frequency, 
                                            ; refer to the DCO table in the 
                                            ; datasheet.