mac2510.h

source code of armboot for s3c4510

	ulong mCompEn:1;
	ulong mNegCAM:1;
	ulong mBroad:1;
	ulong mGroup:1;
	ulong mStation:1;
#else
	ulong mStation:1;
	ulong mGroup:1;
	ulong mBroad:1;
	ulong mNegCAM:1;
	ulong mCompEn:1;
	ulong reserved_0:27;
#endif	
}PACK_RESERVED;

union UNION_CAMCON
{
	struct CAMCON_PACKED	camCon_reg;
	ulong camCon_resetval;
}PACK_RESERVED; 
typedef union UNION_CAMCON uCAMCON;


struct MACTXCON_PACKED
{
#if BIG_ENDIAN
	ulong reserved_0:24;		/* 8 - 31 */
	ulong mSQEn:1;				/* 7 */
	ulong mSdPause:1;			/* 6 */
	ulong mNoDef:1;				/* 5 */
	ulong mFBack:1;				/* 4 */
	ulong mNoCRC:1;				/* 3 */
	ulong mNoPad:1;				/* 2 */
	ulong mTxHalt:1;			/* 1 */
	ulong mTxEn:1;				/* 0 */
#else
	ulong mTxEn:1;				/* 0 */
	ulong mTxHalt:1;			/* 1 */
	ulong mNoPad:1;				/* 2 */
	ulong mNoCRC:1;				/* 3 */
	ulong mFBack:1;				/* 4 */
	ulong mNoDef:1;				/* 5 */
	ulong mSdPause:1;			/* 6 */
	ulong mSQEn:1;				/* 7 */
	ulong reserved_0:24;		/* 8 - 31 */
#endif	
}PACK_RESERVED;

union UNION_MACTXCON
{
	struct MACTXCON_PACKED	macTxCon_reg;
	ulong macTxCon_resetval;
}PACK_RESERVED; 
typedef union UNION_MACTXCON uMACTXCON;



struct MACTXSTAT_PACKED
{
#if BIG_ENDIAN
	ulong reserved_1:15;			/* 16 - 31 */
	ulong mPaused:1;				/* 15 */
	ulong mTxHalted:1;				/* 14 */
	ulong sQEErr:1;					/* 13 */
	ulong mTxDefer:1;				/* 12 */
	ulong mCollCnt:4;				/* 8 - 11 */
	ulong reserved_0:8;				/* 0 - 7 */
#else
	ulong reserved_0:8;				/* 0 - 7 */
	ulong mCollCnt:4;				/* 8 - 11 */
	ulong mTxDefer:1;				/* 12 */
	ulong sQEErr:1;					/* 13 */
	ulong mTxHalted:1;				/* 14 */
	ulong mPaused:1;				/* 15 */
	ulong reserved_1:15;			/* 16 - 31 */
#endif
}PACK_RESERVED;

union UNION_MACTXSTAT
{
	struct MACTXSTAT_PACKED	macTxStat_reg;
	ulong macTxStat_resetval;
}PACK_RESERVED; 
typedef union UNION_MACTXSTAT uMACTXSTAT;


struct MACRXCON_PACKED
{
#if BIG_ENDIAN
	ulong reserved_0:25;		/* 7 - 31 */
	ulong mIgnoreCRC:1;			/* 6 */
	ulong mPassCtl:1;			/* 5 */
	ulong mStripCRC:1;			/* 4 */
	ulong mShortEn:1;			/* 3 */
	ulong mLongEn:1;			/* 2 */
	ulong mRxHalt:1;			/* 1 */
	ulong mRxEn:1;				/* 0 */
#else
	ulong mRxEn:1;				/* 0 */
	ulong mRxHalt:1;			/* 1 */
	ulong mLongEn:1;			/* 2 */
	ulong mShortEn:1;			/* 3 */
	ulong mStripCRC:1;			/* 4 */
	ulong mPassCtl:1;			/* 5 */
	ulong mIgnoreCRC:1;			/* 6 */
	ulong reserved_0:25;		/* 7 - 31 */
#endif
}PACK_RESERVED;

union UNION_MACRXCON
{
	struct MACRXCON_PACKED	macRxCon_reg;
	ulong macRxCon_resetval;
}PACK_RESERVED; 
typedef union UNION_MACRXCON uMACRXCON;


struct MACRXSTAT_PACKED
{
#if BIG_ENDIAN
	ulong reserved_1:16;			/* 12 - 31 */
	ulong mCtlRecd:1;				/* 11 */
	ulong mRxHalted:1;				/* 10 */
	ulong mRx10Stat:1;				/* 9 */
	ulong mRxShort:1;				/* 8 */
	ulong reserved_0:8;				/* 0 - 7 */
#else
	ulong reserved_0:8;				/* 0 - 7 */
	ulong mRxShort:1;				/* 8 */
	ulong mRx10Stat:1;				/* 9 */
	ulong mRxHalted:1;				/* 10 */
	ulong mCtlRecd:1;				/* 11 */
	ulong reserved_1:16;			/* 12 - 31 */
#endif	
}PACK_RESERVED;

union UNION_MACRXSTAT
{
	struct MACRXSTAT_PACKED	macRxCon_reg;
	ulong macRxCon_resetval;
}PACK_RESERVED; 

typedef union UNION_MACRXSTAT uMACRXSTAT;


struct STACON_PACKED
{
#if BIG_ENDIAN
	ulong reserved_1:16;			/* 16 - 31 */
	ulong mMDCrate:3;				/* 13 - 15 */
	ulong reserved_0:1;				/* 12 */
	ulong mPHYbusy:1;				/* 11 */
	ulong mPHYwrite:1;				/* 10 */
	ulong mPHYaddr:5;				/* 5 - 9 */
	ulong mPHYRegAddr:5;			/* 0 - 4 */
#else
	ulong mPHYRegAddr:5;			/* 0 - 4 */
	ulong mPHYaddr:5;				/* 5 - 9 */
	ulong mPHYwrite:1;				/* 10 */
	ulong mPHYbusy:1;				/* 11 */
	ulong reserved_0:1;				/* 12 */
	ulong mMDCrate:3;				/* 13 - 15 */
	ulong reserved_1:16;			/* 16 - 31 */
#endif	
}PACK_RESERVED;

union UNION_STACON
{
	struct STACON_PACKED	staCon_reg;
	ulong staCon_resetval;
}PACK_RESERVED; 
typedef union UNION_STACON uSTACON;


struct CAMEN_PACKED
{
#if BIG_ENDIAN
	ulong reserved_0:11;
	ulong camEnable:21;
#else
	ulong camEnable:21;
	ulong reserved_0:11;
#endif
}PACK_RESERVED;

union UNION_CAMEN
{
	struct CAMEN_PACKED	camen_reg;
	ulong camen_resetval;
}PACK_RESERVED; 
typedef union UNION_CAMEN uCAMEN;


struct EMISSCNT_PACKED
{
#if BIG_ENDIAN
	ulong reserved_0:16;
	ulong missErrCnt:16;
#else
	ulong missErrCnt:16;
	ulong reserved_0:16;
#endif	
}PACK_RESERVED;

union UNION_EMISSCNT
{
	struct EMISSCNT_PACKED	emisscnt_reg;
	ulong emisscnt_resetval;
}PACK_RESERVED; 
typedef union UNION_EMISSCNT uEMISSCNT;

typedef struct etherStatistics
{
	/* Receive statistics counters from */
	ulong rxGood;
	ulong rxBad;
	ulong rxOvMaxSize;
	ulong rxCtlRecd;
	ulong rx10Stat;
	ulong rxAlignErr;
	ulong rxCRCErr;
	ulong rxOverflowErr;
	ulong rxLongErr;
	ulong rxParErr;
	ulong rxHalted;
	
	/* Transmit statistics counters */
	ulong txGood;
	ulong txUnderErr;
	ulong txCollErr;
	ulong txExCollErr;
	ulong txDeferErr;
	ulong txExDeferErr;
	ulong txPaused;
	ulong txNCarrErr;
	ulong txSQE;
	ulong txLateCollErr;
	ulong txParErr;
	ulong txHalted;
} ETHER_STATISTICS;

#ifndef IMPORT
#define IMPORT extern
#endif	/*IMPORT*/

#ifndef STATUS
#define STATUS	int
#endif	/*STATUS*/

#ifndef OK
#define	OK	0
#endif	/*OK*/

#ifndef ERROR
#define	ERROR	(-1)
#endif	/*ERROR*/

#ifndef EOS
#define EOS		'\0'	/* C string terminator */
#endif	/*EOS*/

#ifndef NULL
#define NULL		(0)
#endif	/*NULL*/

#ifndef TRUE
#define TRUE		(1)
#endif	/*TRUE*/

#ifndef FALSE
#define FALSE		(0)
#endif	/*FALSE*/

#define HALF_DUPLEX			0
#define FULL_DUPLEX			1

/** PHY definitions **/
#define PHY_CONTROL_REG 	0
#define PHY_ADDR_A 			0
#define PHY_ADDR_B 			0x01<<5
#define _AUTO_NEGOTIATE 	0x1000
#define _10_MB_HDX 			0
#define _10_MB_FDX 			0x0100
#define _100_MB_FDX 		0x2100
#define _100_MB_HDX 		0x2000

#define ETHERMTU				1500
#define ENET_HDR_REAL_SIZ 	14
#define END_BUFSIZ      		(ETHERMTU + ENET_HDR_REAL_SIZ + 86)

#define	ETHER_REG_ADDR_A		(ASIC_BASE + 0xA0000)
#define	ETHER_REG_ADDR_B		(ASIC_BASE + 0xC0000)

#ifndef REG_OUT_LONG
#   define REG_OUT_LONG(hwbase,addr,value) \
 (*(ulong *)(hwbase+addr) = (value))
#endif

#ifndef REG_IN_LONG
#   define REG_IN_LONG(hwbase,addr,pData) \
	((pData) = *(ulong *)(hwbase+addr))
#endif

#ifndef REG_OUT_SHORT
#   define REG_OUT_SHORT(hwbase,addr,value) \
	(*(ushort *)(hwbase+addr) = (value))
#endif

#ifndef REG_IN_SHORT
#   define REG_IN_SHORT(hwbase,addr,pData) \
	((pData) = *(ushort *)(hwbase+addr))
#endif

/*
 * Macros for number representation conversion.
 */
/*#if	BIG_ENDIAN*/
#if 0
/*#define	ntohl(x)	(x)*/
/*#define	ntohs(x)	(x)*/
/*#define	htonl(x)	(x)*/
/*#define	htons(x)	(x)*/

#define NTOHL(x)	(x) = ntohl((ulong)(x))
#define NTOHS(x)	(x) = ntohs((ushort)(x))
#define HTONL(x)	(x) = htonl((ulong)(x))
#define HTONS(x)	(x) = htons((ushort)(x))

#else
#define ntohl(x)	((((x) & 0x000000ff) << 24) | \
			 (((x) & 0x0000ff00) <<  8) | \
			 (((x) & 0x00ff0000) >>  8) | \
			 (((x) & 0xff000000) >> 24))

#define htonl(x)	((((x) & 0x000000ff) << 24) | \
			 (((x) & 0x0000ff00) <<  8) | \
			 (((x) & 0x00ff0000) >>  8) | \
			 (((x) & 0xff000000) >> 24))

#define ntohs(x)	((((x) & 0x00ff) << 8) | \
			 (((x) & 0xff00) >> 8))

#define htons(x)	((((x) & 0x00ff) << 8) | \
			 (((x) & 0xff00) >> 8))
#define	NTOHL(x)	(x) = ntohl((ulong)(x))
#define	NTOHS(x)	(x) = ntohs((ushort)(x))
#define	HTONL(x)	(x) = htonl((ulong)(x))
#define	HTONS(x)	(x) = htons((ushort)(x))

#endif	/* BIG_ENDIAN */

#define bcopy(s,d,c) memmove(d,s,c)

typedef struct api_Mac_device
{
    int		unit;				/* unit number */
    int		channel;			/* Channel number */

    int		ivecRx;				/* interrupt vector Rx */
	int		ivecTx;				/* interrupt vector Tx */

    ulong	EtherAddr;	/* Base address of Ethernet Register */

    long	flags;				/* Our local flags. */
	int		buffInitialized; 	/* device buffer Initialized */
	int		status;				/* device status */

	RECEIVE_FRAME_DESC 		*gpReceiveFrameDescStart;
	TRANSMIT_FRAME_DESC 	*gpTransmitFrameDescStart;
	TRANSMIT_FRAME_DESC 	*gpSWTransmitFrameDescStart;

	int			RXDONEOFFSET;		/* Current descriptor to check from gpReceiveFrameDescStart */
	int			TXOFFSET;		/* Current descriptor to transmit from gpTransmitFrameDescStart */
	int			TXDONEOFFSET;	/* Current descriptor to check from gpTransmitFrameDescStart */

	ulong		addrList[32];	/* Array for storing addresses Max = 21, i.e. 32 long words */
	ulong		mcastAddrCount;	/* Number of valid multicast addresses */

    uchar		enetAddr[6];	/* ethernet address */
	uchar		netSpeed;		/* 10 or 100 */
	uchar		duplexMode;		/* HDX = 0. FDX = 1 */
	uchar		autoNeg;		/* 1 = autoneg enabled */
	ETHER_STATISTICS	statistics;	/* Ethernet statistics counters */
} API_DEVICE;

/* MAC Api function predefinition */

/* API Sub Fuctions */
int api_MacHWReset	(API_DEVICE *api_Mac_dev);
int api_MacBuffInit(API_DEVICE *api_Mac_dev);
int api_MacBuffFree(API_DEVICE *api_Mac_dev);
int api_MacHWInit(API_DEVICE *api_Mac_dev);
int api_MacHWStart(	API_DEVICE *api_Mac_dev);
int api_MacHWStop(	API_DEVICE *api_Mac_dev);
int api_MacIntEnable	(API_DEVICE *api_Mac_dev);
int api_MacIntDisable(API_DEVICE *api_Mac_dev);
void api_MacRcv(	API_DEVICE *api_Mac_dev);
int api_MacSend(	API_DEVICE *api_Mac_dev,ulong pData,int len);
void	api_init(bd_t *bd, API_DEVICE *api_Mac_dev);
int MAC_PHY_INIT(void);

/* MII Set Sub Function */
ulong miiRead
	(
	API_DEVICE *api_Mac_dev,
	ulong phyAddr,		/* Address of the PHY chip (usually 0 for single PHY) */
	ulong phyRegAddr, 	/* Address of PHY register to be read */
	ulong *phyData		/* Data to be Read */
	);

void miiWrite
	(
	API_DEVICE *api_Mac_dev,
	ulong phyAddr,		/* Address of the PHY chip (usually 0 for single PHY) */
	ulong phyRegAddr, 	/* Address of PHY register to be written */
	ulong phyData		/* Data to be written */
	);

STATUS MII_AutoNeg
	(
	API_DEVICE *api_Mac_dev,
	unsigned long retries,
	int *isFullDuplexP,
	int *is100MbpsP
	);

void intEnable(int vect);
void intDisable(int vect);


/*
 * Our MAC address definition.  User can change this value as
 * per requirement
 */
unsigned char EnetAddrA[6] = {0x00,0x40,0x63,0x80,0x25,0x10};
unsigned char EnetAddrB[6] = {0x00,0x40,0x63,0x80,0x25,0x11};

/* Macro to get the ethernet address from the BSP */
#ifndef SYS_ENET_ADDR_GET
#define SYS_ENET_ADDR_GET(pDevice, EnetAddr) \
	{ \
		bcopy ((char *)EnetAddr, (char *)(&pDevice->enetAddr), 6); \
	}
#endif

#define ETHERMTU				1500
#define ENET_HDR_REAL_SIZ 		14
#define END_BUFSIZ      		(ETHERMTU + ENET_HDR_REAL_SIZ + 86)

#ifndef RX_FD_NUM
#define	RX_FD_NUM_PWR2			(3)		/* 8 = 2^3 */
#define	RX_FD_NUM				(1<<RX_FD_NUM_PWR2)
#endif 	/*RX_FD_NUM*/

#ifndef TX_FD_NUM
#define	TX_FD_NUM_PWR2			(3)		/* 8 = 2^3 */
#define	TX_FD_NUM				(1<<TX_FD_NUM_PWR2)
#endif 	/*TX_FD_NUM*/

typedef enum
{
    HW_RESET_DONE = 0,
    BUFF_INIT_DONE = 1,
    HW_INIT_DONE = 2,
    HW_START_STATUS = 3,
    STOP_STATUS = 4,
    OPEN_CH_STATUS = 5,
    CLOSE_CH_STATUS = 6,
    INT_ENABLE_STATUS = 7,
    INT_DISABLE_STATUS = 8,
    PATH_ENABLE_STATUS = 9,
    PATH_DISABLE_STATUS = 10,
    BUFF_FREE_DONE
} API_STATUS;

#define NOT_INIT_YET			0
#define INIT_DONE				1

#if 0
#define FALSE					0
#define TRUE					1
#endif

#define ETH_PHY_SELECT		0		/*Ethernet Phy select MII = 0, 7Wire = 1*/

/* MII interface definition */
#define MII_CONTROL 0

#define MII_CTRL_RESET ((unsigned short)( 0x8000 ))
#define MII_CTRL_LOOPBACK ((unsigned short)( 0x4000 ))
#define MII_CTRL_100MBPS ((unsigned short)( 0x2000 ))
#define MII_CTRL_AUTO_NEG ((unsigned short)( 0x1000 ))
#define MII_CTRL_POWER_DOWN ((unsigned short)( 0x0800 ))
#define MII_CTRL_ISOLATE ((unsigned short)( 0x0400 ))
#define MII_CTRL_RESTART ((unsigned short)( 0x0200 ))
#define MII_CTRL_FULL_DUPLEX ((unsigned short)( 0x0100 ))
#define MII_CTRL_COLL_TEST ((unsigned short)( 0x0080 ))
#define MII_CTRL_TEST_MODE_MASK ((unsigned short)( 0x0070 ))
#define MII_CTRL_MASTER_SLAVE_EN ((unsigned short)( 0x0008 ))
#define MII_CTRL_MASTER_SLAVE_VAL ((unsigned short)( 0x0004 ))
#define MII_CTRL_RESERVED1_0 ((unsigned short)( 0x0003 ))


#define MII_STATUS 1

#define MII_STAT_T4 ((unsigned short)( 0x8000 ))
#define MII_STAT_TX_FULL_DUPLEX ((unsigned short)( 0x4000 ))
#define MII_STAT_TX ((unsigned short)( 0x2000 ))
#define MII_STAT_10_FULL_DUPLEX ((unsigned short)( 0x1000 ))
#define MII_STAT_10 ((unsigned short)( 0x0800 ))
#define MII_STAT_T2_FULL_DUPLEX ((unsigned short)( 0x0400 ))
#define MII_STAT_T2 ((unsigned short)( 0x0200 ))
#define MII_STAT_RESERVED8 ((unsigned short)( 0x0100 ))
#define MII_STAT_MASTER_SLAVE_FAULT ((unsigned short)( 0x0080 ))
#define MII_STAT_PREAMB_SUPPRESS ((unsigned short)( 0x0040 ))
#define MII_STAT_AUTO_NEG_DONE ((unsigned short)( 0x0020 ))
#define MII_STAT_REMOTE_FAULT ((unsigned short)( 0x0010 ))
#define MII_STAT_AUTO_NEG ((unsigned short)( 0x0008 ))
#define MII_STAT_LINK_UP ((unsigned short)( 0x0004 ))
#define MII_STAT_JABBER_DETECT ((unsigned short)( 0x0002 ))
#define MII_STAT_EXTENDED_CAP ((unsigned short)( 0x0001 ))


#define MII_PHY_ID_1 2

#define MII_PHY_ID_1_MASK ((unsigned short)( 0xFFFF ))


#define MII_PHY_ID_2 3

#define MII_PHY_ID_2_MASK ((unsigned short)( 0xFC00 ))
#define MII_PHY_MODEL_MASK ((unsigned short)( 0x03F0 ))
#define MII_PHY_REV_MASK ((unsigned short)( 0x000F ))

#define MII_OUI(id1, id2) \
  ((((unsigned long)(id1)) << 6) | \
   ((((unsigned long)(id2)) & (MII_PHY_ID_2_MASK)) >> 10))


#define MII_ADVERTISEMENT 4

#define MII_ADVR_NEXT_PAGE ((unsigned short)( 0x8000 ))
#define MII_ADVR_RESERVED14 ((unsigned short)( 0x4000 ))
#define MII_ADVR_REMOTE_FAULT ((unsigned short)( 0x2000 ))
#define MII_ADVR_RESERVED12_11 ((unsigned short)( 0x1800 ))
#define MII_ADVR_PAUSE ((unsigned short)( 0x0400 ))
#define MII_ADVR_T4 ((unsigned short)( 0x0200 ))
#define MII_ADVR_TX_FULL_DUPLEX ((unsigned short)( 0x0100 ))
#define MII_ADVR_TX ((unsigned short)( 0x0080 ))
#define MII_ADVR_10_FULL_DUPLEX ((unsigned short)( 0x0040 ))
#define MII_ADVR_10 ((unsigned short)( 0x0020 ))
#define MII_ADVR_SELECTOR_MASK ((unsigned short)( 0x001F ))
#define MII_ADVR_802_3 ((unsigned short)( 0x0001 ))
#define MII_ADVR_802_3_ISLAN_16T ((unsigned short)( 0x0002 ))


#define MII_LINK_PARTNER 5

#define MII_LINK_NEXT_PAGE ((unsigned short)( 0x8000 ))
#define MII_LINK_ACK ((unsigned short)( 0x4000 ))
#define MII_LINK_REMOTE_FAULT ((unsigned short)( 0x2000 ))
#define MII_LINK_RESERVED12_11 ((unsigned short)( 0x1800 ))
#define MII_LINK_PAUSE ((unsigned short)( 0x0400 ))
#define MII_LINK_T4 ((unsigned short)( 0x0200 ))
#define MII_LINK_TX_FULL_DUPLEX ((unsigned short)( 0x0100 ))
#define MII_LINK_TX ((unsigned short)( 0x0080 ))
#define MII_LINK_10_FULL_DUPLEX ((unsigned short)( 0x0040 ))
#define MII_LINK_10 ((unsigned short)( 0x0020 ))
#define MII_LINK_SELECTOR_MASK ((unsigned short)( 0x001F ))
#define MII_LINK_802_3 ((unsigned short)( 0x0001 ))
#define MII_LINK_802_3_ISLAN_16T ((unsigned short)( 0x0002 ))


#define MII_EXPANSION 6

#define MII_EXP_RESERVED15_5 ((unsigned short)( 0xFFE0 ))
#define MII_EXP_PARALLEL_FAULT ((unsigned short)( 0x0010 ))
#define MII_EXP_LINK_NEXT_PAGE ((unsigned short)( 0x0008 ))
#define MII_EXP_NEXT_PAGE_ABLE ((unsigned short)( 0x0004 ))
#define MII_EXP_PAGE_RECEIVED ((unsigned short)( 0x0002 ))
#define MII_EXP_LINK_AUTO_NEG ((unsigned short)( 0x0001 ))


#define MII_NEXT_PAGE 7


#define MII_MAX_PHY 32
#define MII_MAX_REGS 32

#endif		/*__MAC2510h*/