platform.h

来自「source code of armboot for s3c4510」· C头文件 代码 · 共 103 行

/*
 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
 * All rights reserved.
 *
 * This software is copyrighted by and is the sole property of
 * VIA Networking Technologies, Inc. This software may only be used
 * in accordance with the corresponding license agreement. Any unauthorized
 * use, duplication, transmission, distribution, or disclosure of this
 * software is expressly forbidden.
 *
 * This software is provided by VIA Networking Technologies, Inc. "as is"
 * and any express or implied warranties, including, but not limited to, the
 * implied warranties of merchantability and fitness for a particular purpose
 * are disclaimed. In no event shall VIA Networking Technologies, Inc.
 * be liable for any direct, indirect, incidental, special, exemplary, or
 * consequential damages.
 *
 *
 * File:    soc.h
 *
 * Purpose:
 *
 * Author:  Tevin Chen
 *
 * Date:    Jan 08, 2002
 *
 */


#ifndef __PLATFORM_H__
#define __PLATFORM_H__
#ifdef __SWITCH_CPUIF_PCI
#if !defined(__PCIDRIVER_H__)
#include "pcidriver.h"
#endif
#if !defined(__PCILIB_H__)
#include "pcilib.h"
#endif
#if !defined(__SWPCI_H__)
#include "swpci.h"
#endif
#endif
#if !defined(__TTYPE_H__)
#include "ttype.h"
#endif
#if !defined(__DEVICE_H__)
#include "device.h"
#endif
#if !defined(__ISR_H__)
#include "isr.h"
#endif
/*---------------------  Export Types  ------------------------------*/

/*---------------------  Export Macros  -----------------------------*/
//#define ISR_vSetIntHandlers         INTR_vSetHandler
#define ISR_vIntDisable             INTR_vDisable
#define INTR_vCriticalSectionLeave       INTR_vCriticalSectionLeave

//#define ISR_vDummyHandler           IISR_vDummyHandler
#define ISR_vSwitchIntEnable        INTR_vSwitchEnable
#define ISR_vSwitchIntDisable       INTR_vSwitchDisable
#define INTR_vCriticalSectionLeave       INTR_vCriticalSectionLeave
/*---------------------  Export Definitions  ------------------------*/
#define PLAT_ASIC_NON_CACHE_ADDR    ASIC_NON_CACHE_ADDR
#define PLAT_ASIC_EXTIO_BASE_ADDR   ASIC_EXTIO_BASE_ADDR
#define PLAT_ASIC_CPUIF_BASE_ADDR   ASIC_CPUIF_BASE_ADDR
#define PLAT_ASIC_MODULE_BASE_ADDR  ASIC_MODULE_BASE_ADDR
/*---------------------  Export Definitions  ------------------------*/

/*---------------------  Export Types  ------------------------------*/

/*---------------------  Export Macros  -----------------------------*/

/*---------------------  Export Classes  ----------------------------*/

/*---------------------  Export Variables  --------------------------*/

/*---------------------  Export Functions  --------------------------*/

void  PLAT_vInit(void);
void  PLAT_vSetMacResetPin(UINT8 u8PinLevel);
void  PLAT_vSetPhyResetPin(UINT8 u8PinLevel);
void  PLAT_vBoardReboot(void);
void  PLAT_vDelayLoop(UINT16 u16Delay);
//void   PLAT_vDelay(UINT32 u32Delay);
//void  PLAT_vCacheEnable(void);
void  PLAT_vCacheDisable(void);

void  PLAT_vDma0Enable(void);
void  PLAT_vDma1Enable(void);
void  PLAT_vDma0GenIntr(BOOL bIntrEn);
void  PLAT_vDma1GenIntr(BOOL bIntrEn);
void  PLAT_vDma0TrigRx(PUINT8 pu8Buf, UINT16 u16BufLen, UINT32 u32IoPortAddr);
void  PLAT_vDma0TrigTx(PUINT8 pu8Buf, UINT16 u16BufLen, UINT32 u32IoPortAddr);
void  PLAT_vDma1TrigTx(PUINT8 pu8Buf, UINT16 u16BufLen, UINT32 u32IoPortAddr);




#endif /* __SOC_H__ */