counter.map.qmsg

8位计数器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 01 15:37:54 2007 " "Info: Processing started: Thu Nov 01 15:37:54 2007" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off counter -c counter " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off counter -c counter" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "counter.vhd 2 1 " "Info: Found 2 design units and 1 entities in source file counter.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 counter-one " "Info: Found design unit 1: counter-one" {  } { { "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" "counter-one" "" { Text "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" 9 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 counter " "Info: Found entity 1: counter" {  } { { "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" "counter" "" { Text "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "a counter.vhd(14) " "Warning: VHDL Process Statement warning at counter.vhd(14): signal a is in statement, but is not in sensitivity list" {  } { { "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" "" "" { Text "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" 14 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "b counter.vhd(15) " "Warning: VHDL Process Statement warning at counter.vhd(15): signal b is in statement, but is not in sensitivity list" {  } { { "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" "" "" { Text "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" 15 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "b counter.vhd(23) " "Warning: VHDL Process Statement warning at counter.vhd(23): signal b is in statement, but is not in sensitivity list" {  } { { "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" "" "" { Text "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" 23 0 0 } }  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "q1\[7\]~0 8 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: q1\[7\]~0" {  } { { "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" "" "q1\[7\]~0" { Text "e:/Documents and Settings/user/My Documents/pxh/2/counter.vhd" 27 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "c:/quartus/libraries/megafunctions/lpm_counter.tdf" "lpm_counter" "" { Text "c:/quartus/libraries/megafunctions/lpm_counter.tdf" 221 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_f10ke " "Info: Found entity 1: alt_counter_f10ke" {  } { { "c:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" "alt_counter_f10ke" "" { Text "c:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" 256 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "c:/quartus/libraries/megafunctions/lpm_add_sub.tdf" "lpm_add_sub" "" { Text "c:/quartus/libraries/megafunctions/lpm_add_sub.tdf" 103 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/addcore.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/addcore.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 addcore " "Info: Found entity 1: addcore" {  } { { "c:/quartus/libraries/megafunctions/addcore.tdf" "addcore" "" { Text "c:/quartus/libraries/megafunctions/addcore.tdf" 73 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/a_csnbuffer.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/a_csnbuffer.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 a_csnbuffer " "Info: Found entity 1: a_csnbuffer" {  } { { "c:/quartus/libraries/megafunctions/a_csnbuffer.tdf" "a_csnbuffer" "" { Text "c:/quartus/libraries/megafunctions/a_csnbuffer.tdf" 10 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/quartus/libraries/megafunctions/altshift.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file c:/quartus/libraries/megafunctions/altshift.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altshift " "Info: Found entity 1: altshift" {  } { { "c:/quartus/libraries/megafunctions/altshift.tdf" "altshift" "" { Text "c:/quartus/libraries/megafunctions/altshift.tdf" 34 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "69 " "Info: Implemented 69 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "8 " "Info: Implemented 8 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "57 " "Info: Implemented 57 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Nov 01 15:37:57 2007 " "Info: Processing ended: Thu Nov 01 15:37:57 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}