st7_misc.lst

该程序是ST7MC驱动三洋压缩机（交流）

ANSI-C/cC++ Compiler for ST7 V-5.0.7, Aug 21 2001

    1:  /**************** (c) 2004  STMicroelectronics **********************
    2:       
    3:  PROJECT  : 3-phase AC induction motor drive Software Library
    4:  COMPILER : COSMIC / METROWERKS
    5:  
    6:  MODULE  :  ST7_Misc.c
    7:  VERSION :  1.0.0
    8:  
    9:  CREATION DATE : April 2004
   10:  
   11:  AUTHOR :	V. Onde / Microcontroller Division Applications
   12:  			Consumer & Micro Group
   13:  
   14:  -*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-
   15:  
   16:  DESCRIPTION :   ST7 specifics handling routines
   17:                
   18:  -*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-
   19:  
   20:  MODIFICATIONS :
   21:  
   22:   ******************************************************************************
   23:   THE SOFTWARE INCLUDED IN THIS FILE IS FOR GUIDANCE ONLY. ST MICROELECTRONICS
   24:   SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES
   25:   WITH RESPECT TO ANY CLAIMS ARISING FROM USE OF THIS SOFTWARE.
   26:  *******************************************************************************
   27:  
   28:  ******************************************************************************/
   29:  
   30:  // Standard types definitions and ST7 specific macros
   31:  #include "lib.h"
   32:  // ST7 specifics related functions prototypes
   33:  #include "ST7_Misc.h"
   34:  // ST7FMC peripherals Hardware Registers declaration
   35:  #include "ST7FMC2N6.h"
   36:  
   37:  /* -------------------------- Private constants ---------------------------- */
   38:  // ISPR0 Register interrupts priority definitions
   39:  #define MCES_LVL_0			((u8)0x02)
   40:  #define MCES_LVL_1			((u8)0x01)
   41:  #define MCES_LVL_2			((u8)0x00)
   42:  #define MCES_LVL_3			((u8)0x03)
   43:  
   44:  #define MCC_SI_LVL_0			((u8)(0x02<<2))
   45:  #define MCC_SI_LVL_1			((u8)(0x01<<2))
   46:  #define MCC_SI_LVL_2			((u8)(0x00<<2))
   47:  #define MCC_SI_LVL_3			((u8)(0x03<<2))
   48:  
   49:  #define EXT_IT0_LVL_0		((u8)(0x02<<4))
   50:  #define EXT_IT0_LVL_1		((u8)(0x01<<4))
   51:  #define EXT_IT0_LVL_2		((u8)(0x00<<4))
   52:  #define EXT_IT0_LVL_3		((u8)(0x03<<4))
   53:  
   54:  #define EXT_IT1_LVL_0		((u8)(0x02<<6))
   55:  #define EXT_IT1_LVL_1		((u8)(0x01<<6))
   56:  #define EXT_IT1_LVL_2		((u8)(0x00<<6))
   57:  #define EXT_IT1_LVL_3		((u8)(0x03<<6))
   58:  
   59:  // ----------------------- ISPR1 Register interrupts priority 
   60:  #define EXT_IT2_LVL_0			((u8)0x02)
   61:  #define EXT_IT2_LVL_1			((u8)0x01)
   62:  #define EXT_IT2_LVL_2			((u8)0x00)
   63:  #define EXT_IT2_LVL_3			((u8)0x03)
   64:  
   65:  #define MTC_U_CL_SO_LVL_0		((u8)(0x02<<2))
   66:  #define MTC_U_CL_SO_LVL_1		((u8)(0x01<<2))
   67:  #define MTC_U_CL_SO_LVL_2		((u8)(0x00<<2))
   68:  #define MTC_U_CL_SO_LVL_3		((u8)(0x03<<2))
   69:  
   70:  #define MTC_R_Z_LVL_0			((u8)(0x02<<4))
   71:  #define MTC_R_Z_LVL_1			((u8)(0x01<<4))
   72:  #define MTC_R_Z_LVL_2			((u8)(0x00<<4))
   73:  #define MTC_R_Z_LVL_3			((u8)(0x03<<4))
   74:  
   75:  #define MTC_C_D_LVL_0			((u8)(0x02<<6))
   76:  #define MTC_C_D_LVL_1			((u8)(0x01<<6))
   77:  #define MTC_C_D_LVL_2			((u8)(0x00<<6))
   78:  #define MTC_C_D_LVL_3			((u8)(0x03<<6))
   79:  
   80:  // ----------------------- ISPR2 Register interrupts priority 
   81:  #define SPI_LVL_0				((u8)0x02)
   82:  #define SPI_LVL_1				((u8)0x01)
   83:  #define SPI_LVL_2				((u8)0x00)
   84:  #define SPI_LVL_3				((u8)0x03)
   85:  
   86:  #define TIMER_A_LVL_0		((u8)(0x02<<2))
   87:  #define TIMER_A_LVL_1		((u8)(0x01<<2))
   88:  #define TIMER_A_LVL_2		((u8)(0x00<<2))
   89:  #define TIMER_A_LVL_3		((u8)(0x03<<2))
   90:  
   91:  #define TIMER_B_LVL_0		((u8)(0x02<<4))
   92:  #define TIMER_B_LVL_1		((u8)(0x01<<4))
   93:  #define TIMER_B_LVL_2		((u8)(0x00<<4))
   94:  #define TIMER_B_LVL_3		((u8)(0x03<<4))
   95:  
   96:  #define SCI_LVL_0				((u8)(0x02<<6))
   97:  #define SCI_LVL_1				((u8)(0x01<<6))
   98:  #define SCI_LVL_2				((u8)(0x00<<6))
   99:  #define SCI_LVL_3				((u8)(0x03<<6))
  100:  
  101:  // ----------------------- ISPR3 Register interrupts priority 
  102:  #define AVD_LVL_0				((u8)0x02)
  103:  #define AVD_LVL_1				((u8)0x01)
  104:  #define AVD_LVL_2				((u8)0x00)
  105:  #define AVD_LVL_3				((u8)0x03)
  106:  
  107:  #define PWMART_LVL_0			((u8)(0x02<<2))
  108:  #define PWMART_LVL_1			((u8)(0x01<<2))
  109:  #define PWMART_LVL_2			((u8)(0x00<<2))
  110:  #define PWMART_LVL_3			((u8)(0x03<<2))
  111:  
  112:  
  113:  
  114:  void ST7_IntPrioritySetUp(void)
  115:  {

Function: ST7_IntPrioritySetUp
Source  : ..\..\source\ST7_Misc.c
Options : -Cc -F7 -Lasm=%n.lst -Ml -N -Os -Ou -Of -Ol0 -OnPMNC -Or

  116:  	// Interrupt Software priority Register 0
  117:  	// MCES: top level, others lowest level (MCC, CSS, Ext int0, Ext int1)
  118:  	ISPR0 = MCES_LVL_3 + MCC_SI_LVL_0 + EXT_IT0_LVL_0 + EXT_IT1_LVL_0;
  0000 a6ab     LD    A,#171
  0002 b700     LD    ISPR0,A
  119:  
  120:  	// Interrupt Software priority Register 1
  121:  	// PMW update: top level, Ratio update and tacho capture medium/high level,
  122:  	// Ext int2 not used
  123:  	ISPR1 = EXT_IT2_LVL_0 + MTC_U_CL_SO_LVL_3 + MTC_R_Z_LVL_2 + MTC_C_D_LVL_2;
  0004 a60e     LD    A,#14
  0006 b700     LD    ISPR1,A
  124:  
  125:  	// Interrupt Software priority Register 2
  126:  	// SPI, TimerA, TimerB and SCI not used
  127:  	ISPR2 = SPI_LVL_0 + TIMER_A_LVL_0 + TIMER_B_LVL_0 + SCI_LVL_0;
  0008 a6aa     LD    A,#170
  000a b700     LD    ISPR2,A
  128:  
  129:  	// Interrupt Software priority Register 3
  130:  	// PWMART medium/low priority, AVD not used
  131:  	ISPR3 = AVD_LVL_0 + PWMART_LVL_1;
  000c a606     LD    A,#6
  000e b700     LD    ISPR3,A
  132:  
  133:  }
  0010 81       RET   
  134:  /*** (c) 2004  STMicroelectronics **************************** END OF FILE ***/