📄 15fre280.c
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#define ctubead tempad[6]
#define gasad tempad[7]
#define voltagead tempad[8]
#define fread tempad[9]
unsigned currentad;
#define Bphase btubead
/***********************************************/
/********* define fault display variable */
/**********************************************/
unsigned8 defaultnum,defaultsparklenum;
/***********************************************/
/********* define defrost variable */
/**********************************************/
unsigned8 defroststage,defrost4mintmr;
unsigned8 defrost8mintmr,heat40mintmr,defrost1mintmr;
unsigned8 min1tmr;
unsigned8 comp1mintmr;
unsigned8 i,j,inti,m,n,r;
unsigned8 intj;
unsigned16 k,intk;
unsigned8 overIdecfrecounter,stopincfretmr,stepbysteptmr,frekeeptmr2; //add by zsq at 040324
unsigned8 incfrewaittmr,incfrecounter,vdec6hzcounter,vdec9hzcounter,vdec12hzcounter,onethirdsectmr;//add by zsq at 040402
unsigned8 contactorstoptmr,contactorstarttmr,moduleerrcnt;
unsigned8 fracCounter;
#pragma section code near /*const*/
const unsigned8 SIN[702];//0311 0127 modify
const unsigned8 SIN1[702];
const unsigned16 VFTAB[151];//0311 0127 modify
const unsigned8 deftab[20];
const unsigned8 frevaritab1[19] ;
const unsigned8 frevaritab2[19];
const unsigned8 SenErrTab[8] ;
const unsigned8 SenOkTab[8];
const unsigned8 AdTempTab[141];
const unsigned8 valvetab[8];
const unsigned8 valvetab1[8];
const unsigned8 tabmode[8];
const unsigned8 commuconflicttab[8];
const unsigned8 commuconflicttab1[8];
const unsigned16 commuerrtab[16];
const unsigned16 commuerrtab1[16];
void main(void) {
// Disable interrupt, disable watch dog timer and initialize stack pointer.
__DI();
WDTCR1 = 0x0B ; /*Disable watchdog timer00*/
WDTCR2 = 0xb1;
__SP = (void __far*)CENDRAM;
ClearRam();
//CGCR=0x05;
//__asm("LD RBS,1","LD HL,0x060");
//__asm("clearram1:","CLR (HL+)","CMP HL,0x434","JR LE,clearram1");
TBTCR=0x04; /*tbt timer 1.953msec*/
TBTCR=0x04|0x08;
TREG2 =5000;
TC2CR =0x2c;
EINTCR=0x00; /*4 us noise rejection,P10 as output port,int4,3,2,1 rising edge valid*/
P6CR=0x07;//20021112
P0=0x3f; /*u,v,w is high,x,y,z is low*/
P0CR=0x3f;//0220
//outfanport=0xe1;//020725 e3
//020725P2=0;
P2=0xff;//0309
//P7=0x0f;0220
P7CR=0xf0;
//P1=0x0e;0220
P1CR=0xff;/*f3;*/
P5=0x0a;
P6=0x00;
//020725 P3=0x00;
/*P4=0xff;0127*/
EIRE =0x0002; /* TC2 interrupt : 0.5us * 5000 = 2.5ms */
/*MDOUT2=0x15 ;u,v,w =0;x,y,z=1 turn off P3 PWM,H/L output,*/
MDCR=0xc7;/*f7 .020725 TLP759 1103 set triangular modulation,enalble pwm circuit*/
MDPRD=f3khz/2; /* f3khz/2;PWM FREQUENCE IS 2.8KHZ,*/
DTR=0x15;//0x30; /*020725 from 30 active high,pwm waves independently40*/
WDTCR2 = 0x4E;
for(i=0;i<255;i++)
{ for(j=0;j<255;j++)
{;}
}
WDTCR2 = 0x4E;
for(i=0;i<255;i++)
{ for(j=0;j<255;j++)
{;}
}
WDTCR2 = 0x4E;
EMGREL=0x5a ;/*inhibte emg protective*/
EMGREL=0xa5 ;/*inhibte emg protective*/
EMGCR=0xf0 ;/* v11 inhibte emg protective*/
EMGCR=0xf1 ;/*enable emg protective*/
MDOUT=0x15 ;/*020725 15u,v,w =0;x,y,z=1 turn off IPM,H/L output,*/
initvar(); /*MDOUT=0x73f; 1103 pwm output port enable*/
ILL=0x0 ;/* Clear interrupt latch*/
ILE=0x0;
__EI();
while(0==0)
{
//if(frac==0||frac>=10)20021219
WDTCR2 = 0x4E;
commu();
// receivedeal1();
clkdeal();
addeal();
//030308 v10 moddeal();
speed();
}
}
void commu()
{
if(ftxenable==0)
{if(frxbusy==0)
{
commuenableport=commuenableport&0xdf;// P7.5 clear ,mod from 7f P7.7 clear enable receive
byteadd=0;
frxend=0;
buffer=0;
frxbusy=1;
commurectmr=10;
rxdelay100ms=10; // 030308 fredrive 250 3 0923 if 2 second later,no receive signal,fover=1,*/
UARTCR1=0x53;//030308 v10 fredrv 5c-4800bits/s
UARTCR2=0x04;//020725 enable receive
EIRE=EIRE|0x4000;
}
else /*receive deal*/ //the receive had started and to judge weather the receive has finish
{
if(frxend==0&&rxdelay100ms==0)
{
byteadd=0;
//frxbusy=0;
//ftxenable=0;
}
if(frxend==1) /* 30308 commu err or receive end */
{ frxbusy=0;
ftxbusy=0;
EIRE=EIRE&0x0bfff;
UARTCR1=0x13;//030308 v10 fredrv 1c;
ftxenable=1;/*030308 v10 */
frxend=0;
m=indoorsendlength+1;
for(j=0,i=1;i<m;i++)
j=j^buf[i];
if(j!=buf[m]||buf[1]!=buf[4]||buf[2]!=buf[5])
{
errno[machineadd-1]=errno[machineadd-1]+1; /*once communication error happens,errno increase */
if (errno[machineadd-1]>=communotrecnum)
{ errno[machineadd-1]=communotrecnum;//20020705 if(errno==0)fcomerr=0;
fcomerr=1;//030308 v10 if(k==0xff)
}
}
else
{
i=alarmh&&0x71;//51;
if(i==0)//||fdefrost==1)//030729
defaultport=defaultport^0x01;
errno[machineadd-1]=0;
fcomerr=0;
//fcomok=1;
receivedeal1();
}
}
}
}
else
{if(rxdelay100ms==0)
{if (ftxbusy==0)
{ftxbusy=1; /*send initial*/
commuenableport=commuenableport|0x20; // P7.5 set,enable send
byteadd=0;
ftxend=0;
fsendhl=0;
UARTCR1=0x93;/*baud rate is 4800,enable transmit operation 0917*/
//RDBUF=startcode;
freceivehl=0;//0926
EIRE=EIRE|0x8000;//0926
buf[0]=startcode;
buf[outdoorsendlength+4]=finishcode;//030314 fredrv
//i=alarmh;
if(fmodulefault==1||fovercurrent==1||fmoduleerr==1)//if(fmodulefault==1&&modulprotectfre>=6||fovercurrent==1&&overcurrentfre>=6)
{buf[1]=alarmh;
buf[4]=alarmh;
}
else
{
buf[1]=0; //040100
buf[4]=0;
}
//if(fnomalstop==1||fnomalstart==1)buf[1]=0; //030729
buf[2]=frac; //030308 v10 fredrv
buf[5]=frac;
for(i=1,checksum=0;i<=outdoorsendlength;i++)
{checksum=checksum^buf[i];} //030308 v10 fredrv
buf[outdoorsendlength+1]=checksum;
}//0926 buffer
if (ftxend==0) /*if sending dosn't finish,what will be sent is transformed to buffer*/
{
UARTCR1=0x93;//030308 v10 fredrv
buffer=buf[byteadd]; //030314 fredrv
i=UARTSR;//0105
i=i&0x04;//0105
if(i!=0)RDBUF=buffer ;//0105
}
else
{UARTCR1=0x13;//1c 030308 v10 fredrv when finish, stop transmit
if(rxdelay100ms==0)//0105
{ftxend=0;
ftxbusy=0;
ftxenable=0;
ftxbusy=0;
frxbusy=0;
}
}
}
}
}
void receivedeal1()
{ //buf[1]=0x8f;
//buf[2]=90;
i=buf[1]&0x40;
if(i!=0&&f50hzcomp==0)
{ f50hzcomp=1;
if(frac>30)fexplacefrac=1;//v11 40
}
else
{ if(i==0)
{ f50hzcomp=0;
fexplacefrac=0;
}
}
i=buf[1]&0x20;
if(i==0)
fdefrost=0;
else
fdefrost=1;
i=buf[1]&0x10; //add by zsq at 040329
if(i==0) //add by zsq at 040329
femgstop=0; //add by zsq at 040329
else //add by zsq at 040329
femgstop=1; //add by zsq at 040329
i=buf[1]&0x80;
if(i==0)
{ fconstop=1;
if(fconstart==1)
{ contactorstoptmr=250;
fconstart=0;
}
}
if(i!=0)
{ fconstart=1;
if(fconstop==1)
{ contactorstarttmr=12;
fconstop=0;
}
}
//receivefreq=buf[2];
if(contactorstarttmr==0&&fconstart==1)
{
if(i!=0&&buf[2]==0)//means the enviroment temp. arrived the set temp.mod. by zsq at 040313 from if(i==0&&buf[2]==0)
{ if(frac>32&&femgstop==0) //add by zsq at 040329
{ targetfre=30; //add by zsq at 040329
fstopdecfreq=1; //add by zsq at 040329
fremax=0;
}
else
{ fstopdecfreq=0; //add by zsq at 040329
targetfre==0;
if(frac!=0)
fcmpoff=1;
fremax=0;
}
}
else //the enviroment temp. hasn't arrived set-temp.
{ if(i!=0&&buf[2]!=0)
{ k=buf[2]*86;
i=k/100;
targetfre=i+5;
if(targetfre>48&&targetfre<55)
targetfre=48;
if(targetfre>=55&&targetfre<60)
targetfre=60;//040209
if(fexplacefrac==1&&frac>30)
targetfre=30;//v11 40
else
{fexplacefrac=0;}
if(targetfre<30)
targetfre=30;
if(targetfre>100)
targetfre=100;
fremax=targetfre;
}
}
}
else
{ if(frac>32&&femgstop==0) //add by zsq at 040329
{ targetfre=30; //add by zsq at 040329
fstopdecfreq=1;
fremax=0; //add by zsq at 040329
} //add by zsq at 040329
else
{ fstopdecfreq=0; ////add by zsq at 040329
targetfre=0;
if(frac!=0)
fcmpoff=1;
fremax=0;
}
}
}
void clkdeal()
{ if(fonethirdsec==1)
{ fonethirdsec=0;
if(ratechange!=0)
ratechange=ratechange-1;
}
if(fhalfsecond==1)/*.overflow*/
{ fhalfsecond=0;/*.overflow*/
//del. by zsq at 040302 if(ratechange!=0) {ratechange=ratechange-1;} /* every 2*500ms ,ratechange valuated */
if(ptcdelay>0)
{ptcdelay=ptcdelay-1;
}//020725
if(f1second==0)
{f1second=1;}
else /*1 second */
{f1second=0;
if(commurectmr!=0)
{commurectmr=commurectmr-1;
if (commurectmr==0)
{fcomerr=1;}
}
if(contactorstoptmr!=0)contactorstoptmr=contactorstoptmr-1;
if(contactorstarttmr!=0&&fconstart==1)
contactorstarttmr=contactorstarttmr-1;
//if(overIdecfretmr!=0)overIdecfretmr=overIdecfretmr-1; //add by zsq at 040324
if(stopincfretmr!=0)stopincfretmr=stopincfretmr-1; //add by zsq at 040324
//del. by zsq at 040402 if(fredec20stmr!=0)fredec20stmr=fredec20stmr-1;//030111
if(incfrewaittmr!=0)
{
incfrewaittmr=incfrewaittmr-1;
if(frac>48&&frac<59)
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