rtd-dm7520.c

rt 7520采集卡 linux驱动源代码

/*
	FILE NAME: rtd-dm7520.c

	FILE DESCRIPTION: DM7520 driver source code

	PROJECT NAME: Linux DM7520 Driver, Library, and Example Programs

	PROJECT VERSION: (Defined in README.TXT)
	
	Copyright 2004 RTD Embedded Technologies, Inc.  All Rights Reserved.
*/

#include <linux/config.h>

#if CONFIG_MODVERSIONS==1

#define MODVERSIONS
#include <linux/modversions.h>

#endif

#include <linux/kernel.h>
#include <linux/module.h>
//#include <linux/smp_lock.h>

/* For character devices */
#include <linux/fs.h>
#include <linux/wrapper.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <linux/proc_fs.h>
#include <linux/poll.h>

#include "dm7520.h"
#include "dm7520_driver.h"

#define DRIVER_COPYRIGHT \
	"Copyright 2004 RTD Embedded Technologies, Inc.  All Rights Reserved."
#define DRIVER_DESCRIPTION "DM7520 device driver"
#define DRIVER_NAME "rtd-dm7520"
#define DRIVER_RELEASE "1.8"

MODULE_AUTHOR(DRIVER_COPYRIGHT);
MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
MODULE_LICENSE("Proprietary");

MODULE_PARM(verbose, "1i"); /* one integer debugging parameter */
MODULE_PARM_DESC(verbose, "verbosity level");

#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)
#define pci_base_address(p, n)  (p)->base_address[n]
#define virt_to_page(page)	(mem_map+MAP_NR(page))
//int kernel_locked = 0;
#else
#define pci_base_address(p, n)  (p)->resource[n].start
#endif

#if LINUX_VERSION_CODE > KERNEL_VERSION(2,2,0)
#include <asm/uaccess.h>  /* put_user */
#endif

#define VPRINTK if (verbose) printk
DM7520_STAT dm7520_table[MAXDM7520];

static int dm7520_major;
static int verbose;
static dm7520Timer timer;
static uint32_t itstatus;

int dm7520_register_procfile(int);
void dm7520_unregister_procfile(int);

static void setTimer(dm7520Timer *timer, int delay){
    struct timeval tv;
    do_gettimeofday(&tv);
    timer->start = tv.tv_sec;
    timer->end = timer->start + delay;
    timer->timeout = 0;
}

static int isTimeOut(dm7520Timer *timer) {
	struct timeval tv;
	do_gettimeofday(&tv);
	return (timer->timeout = (timer->end < tv.tv_sec));
}

static int dm7520_fasync(int fd, struct file * filep, int mode);

static void reset_card(int minor)
{
 PUTMEM32(minor, LAS0, LAS0_BOARD_RESET,0);
}

static void enable_PLX_it (int minor)
{
 static uint32_t itcsr;

 itcsr=GETMEM32(minor,LCFG,LCFG_ITCSR);
 itcsr|=(PIRQE_PCI|PIRQE_LINT|PIRQE_DMA0|PIRQE_DMA1);
 PUTMEM32(minor,LCFG,LCFG_ITCSR,itcsr);
}

static void disable_PLX_it (int minor)
{
 static uint32_t itcsr;

 itcsr=GETMEM32(minor,LCFG,LCFG_ITCSR);
 itcsr&=~(PIRQE_PCI|PIRQE_LINT);  
 PUTMEM32(minor,LCFG,LCFG_ITCSR,itcsr);
}

//----------------------------------------------------------------


static void set_dma0src (int board, uint16_t src )
{
 PUTMEM32(board,LAS0,LAS0_DMA0_SRC,src);
} 

static void set_dma1src (int board, uint16_t src )
{
 PUTMEM32(board,LAS0,LAS0_DMA1_SRC,src);
} 

static void reset_dma0state ( int board )
{
 PUTMEM32(board,LAS0,LAS0_DMA0_RST,NO_ARG);
}

static void reset_dma1state ( int board )
{
 PUTMEM32(board,LAS0,LAS0_DMA1_RST,NO_ARG);
}

static void set_dma0mode ( int board, uint32_t mode )
{
 PUTMEM32(board,LCFG,LCFG_DMAMODE0,mode);
}

static void set_dma1mode ( int board, uint32_t mode )
{
 PUTMEM32(board,LCFG,LCFG_DMAMODE1,mode);
}

static uint32_t get_dma0mode ( int board )
{
 return(GETMEM32(board,LCFG,LCFG_DMAMODE0));
}

static uint32_t get_dma1mode ( int board )
{
 return(GETMEM32(board,LCFG,LCFG_DMAMODE1));
}

static void set_dma0Paddr ( int board, uint32_t addr )
{
 PUTMEM32(board,LCFG,LCFG_DMAPADR0,addr);
}

static void set_dma1Paddr ( int board, uint32_t addr )
{
 PUTMEM32(board,LCFG,LCFG_DMAPADR1,addr);
}

static void set_dma0Laddr ( int board, uint32_t addr )
{
 PUTMEM32(board,LCFG,LCFG_DMALADR0,addr);
}

static void set_dma1Laddr ( int board, uint32_t addr )
{
 PUTMEM32(board,LCFG,LCFG_DMALADR1,addr);
}

static void set_dma0size ( int board, uint32_t size )
{
 PUTMEM32(board,LCFG,LCFG_DMASIZ0,size);
}

static void set_dma1size ( int board, uint32_t size )
{
 PUTMEM32(board,LCFG,LCFG_DMASIZ1,size);
}

static uint32_t get_dma0size ( int board )
{
 return(GETMEM32(board,LCFG,LCFG_DMASIZ0));
}

static uint32_t get_dma1size ( int board )
{
 return(GETMEM32(board,LCFG,LCFG_DMASIZ1));
}

static void set_dma0dir ( int board, int dir )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMADPR0);
 reg&=0xFFFFFFF7;
 reg|=(dir&0x01)<<3;
 PUTMEM32(board,LCFG,LCFG_DMADPR0,reg);
}

static void set_dma1dir ( int board, int dir )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMADPR1);
 reg&=0xFFFFFFF7;
 reg|=(dir&0x01)<<3;
 PUTMEM32(board,LCFG,LCFG_DMADPR1,reg);
}

static void set_dma0command ( int board, int csr )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x0000FF00;
 reg|=csr;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static void set_dma1command ( int board, int csr )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x000000FF;
 reg|=(csr<<8);
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static uint32_t get_dma0status ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x000000FF;
 return(reg);
}

static uint32_t get_dma1status ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x0000FF00;
 reg>>=8;
 return(reg);
}

static void enable_dma0 ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000001;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static void enable_dma1 ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000100;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static void disable_dma0 ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=~0x00000001;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static void disable_dma1 ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=~0x00000100;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static int is_dma0enabled ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x00000001;
 return(0!=reg);
}

static int is_dma1enabled ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x00000100;
 return(0!=reg);
}

static void disable_dma ( int board, int dmach )
{
 switch (dmach)
   {
    case 0: disable_dma0(board);
            break;
    case 1: disable_dma1(board);
            break;
    default: break;
   }
}

static void start_dma0 ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000002;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static void start_dma1 ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000200;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static void clear_dma0it ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000008;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static void clear_dma1it ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000800;
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
}

static int is_dma0done ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 return( 0 != (reg & DMA0_DONE) );
}

static int is_dma1done ( int board )
{
 uint32_t reg;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg>>=8;
 return( 0 != (reg & DMA1_DONE) );
}

static void reset_dma0 ( int board )
{
 PUTMEM32(board,LCFG,LAS0_DMA0_RST,0);
}

static void reset_dma1 ( int board )
{
 PUTMEM32(board,LCFG,LAS0_DMA1_RST,0);
}


#define DM7520_MAXWAIT 10000
static void abort_dma0 ( int board )
{
 uint32_t reg;
 int maxwait=0;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x00001000;
 if(reg)
     return;   // Return if channel done

 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000100;  // Enable channel
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);

 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x0000FFFE;  // Clear channel enable bit
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
 reg|=0x00000004;  // Set abort bit
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);

 // Wait for channel done
 do{
     reg=GETMEM32(board,LCFG,LCFG_DMACSR);
     reg&=0x00000010;
     maxwait++;
 }while((maxwait<DM7520_MAXWAIT) && (reg==0));
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x0000FFFB;  // Clear abort bit
 reg|=0x00000001;  // Enable channel
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);

} 

static void abort_dma1 ( int board )
{
 uint32_t reg;
 int maxwait=0;
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x00001000;
 if(reg)
     return;   // Return if channel done
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg|=0x00000100;  // Enable channel
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);

 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x0000FEFF;  // Clear channel enable bit
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);
 reg|=0x00000400;  // Set abort bit
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);

 // Wait for channel done
 do{
     reg=GETMEM32(board,LCFG,LCFG_DMACSR);
     reg&=0x00001000;
     maxwait++;
 }while((maxwait<DM7520_MAXWAIT) && (reg==0));
 reg=GETMEM32(board,LCFG,LCFG_DMACSR);
 reg&=0x0000FBFF;  // Clear abort bit
 reg|=0x00000100;  // Enable channel
 PUTMEM32(board,LCFG,LCFG_DMACSR,reg);

} 

static int dm7520_probefifosize(int board)
{
 uint32_t fifostat;
 int i;
 int size=0;

 PUTMEM32(board,LAS0,LAS0_ADC_FIFO_CLEAR,NO_ARG);
 PUTMEM32(board,LAS0,LAS0_CG_CONTROL,0);
 PUTMEM32(board,LAS0,LAS0_CGL_WRITE,0);

 for (i=1;(size==0) && (i<MAXFIFOSIZE);i++)
   {
    PUTMEM32(board,LAS0,LAS0_ADC,NO_ARG);
    fifostat=GETMEM32(board,LAS0,LAS0_ADC);
    if (0==(fifostat & FS_ADC_FULL))
      size=i;
   }

 PUTMEM32(board, LAS0, LAS0_ADC_FIFO_CLEAR,NO_ARG);
 reset_card(board);
 return(size);