librtd-dm6430.c

rt 6430 采集卡 linux下驱动源代码

	    break;
    }

    return moutw6430(descriptor, r_TRIGGER_6430, 0xF3FF, Burst_Trigger << 10);
}


int
SetTriggerPolarity6430(int descriptor, enum DM6430HR_POLAR Polarity) {
    switch (Polarity) {
	case DM6430HR_POLAR_POSITIVE:
	case DM6430HR_POLAR_NEGATIVE:
	    break;

	default:
	    errno = EINVAL;
	    return -1;
	    break;
    }

    return moutw6430(descriptor, r_TRIGGER_6430, 0xEFFF, Polarity << 12);
}


int
SetTriggerRepeat6430(int descriptor, enum DM6430HR_REPEAT Repeat) {
    switch (Repeat) {
	case DM6430HR_REPEAT_SINGLE:
	case DM6430HR_REPEAT_REPEAT:
	    break;

	default:
	    errno = EINVAL;
	    return -1;
	    break;
    }

    return moutw6430(descriptor, r_TRIGGER_6430, 0xDFFF, Repeat << 13);
}


int
LoadIRQRegister6430(int descriptor, u_int16_t value) {
    return outw6430(descriptor, r_IRQ_6430, value);
}


int
SetIRQ0Source6430(int descriptor, enum DM6430HR_INTSRC IRQSource) {
    if (validate_interrupt_source(IRQSource) == -1) {
	return -1;
    }

    return moutw6430(descriptor, r_IRQ_6430, 0xFFE0, IRQSource);
}


int
SetIRQ1Source6430(int descriptor, enum DM6430HR_INTSRC IRQSource) {
    if (validate_interrupt_source(IRQSource) == -1) {
	return -1;
    }

    return moutw6430(descriptor, r_IRQ_6430, 0xE0FF, IRQSource << 8);
}


int
ReadDINFIFO6430(int descriptor, u_int8_t *digital_data_p) {
    return inb6430(descriptor, r_DIN_FIFO_6430, digital_data_p);
}


int
LoadDINConfigRegister6430(int descriptor, u_int16_t value) {
    return outw6430(descriptor, r_DIN_CONFIG_6430, value);
}


int
ConfigDINClock6430(int descriptor, enum DM6430HR_DI_FIFO_CLK DIN_Clock) {
    switch (DIN_Clock) {
	case DM6430HR_DI_FIFO_CLK_USER_TC0:
	case DM6430HR_DI_FIFO_CLK_USER_TC1:
	case DM6430HR_DI_FIFO_CLK_AD_WRITE_FIFO:
	case DM6430HR_DI_FIFO_CLK_EXTERNAL_PACER:
	case DM6430HR_DI_FIFO_CLK_EXTERNAL_TRIG:
	    break;

	default:
	    errno = EINVAL;
	    return -1;
	    break;
    }

    return moutw6430(descriptor, r_DIN_CONFIG_6430, 0xFFF8, DIN_Clock);
}


int
DINClockEnable6430(int descriptor, int Enable) {
    u_int16_t	enable_mask = 0x0000;

    if (Enable != 0) {
	enable_mask |= (1 << 3);
    }
    return moutw6430(descriptor, r_DIN_CONFIG_6430, 0xFFF7, enable_mask);
}


int
LoadDAC6430(int descriptor, int16_t Data) {
    return outw6430(descriptor, r_DAC1_6430, Data);
}


int
LoadDAC26430(int descriptor, int16_t Data) {
    return outw6430(descriptor, r_DAC2_6430, Data);
}


int
ClockMode6430(
    int descriptor,
    enum DM6430HR_CLK Timer,
    enum DM6430HR_CLK_MODE Mode
) {
    if (validate_clock_timer(Timer) == -1) {
	return -1;
    }

    switch (Mode) {
	case DM6430HR_CLK_MODE0:
	case DM6430HR_CLK_MODE1:
	case DM6430HR_CLK_MODE2:
	case DM6430HR_CLK_MODE3:
	case DM6430HR_CLK_MODE4:
	case DM6430HR_CLK_MODE5:
	    break;

	default:
	    errno = EINVAL;
	    return -1;
	    break;
    }

    return outb6430(
	descriptor,
	r_TIMER_CTRL_6430,
	(((Timer & 0x3) << 6) | ((Mode & 0x7) << 1) | 0x30)
    );
}


int
ClockDivisor6430(int descriptor, enum DM6430HR_CLK Timer, u_int16_t Divisor) {
    int	status;
    int	timer = ((Timer & 0x3) << 1);

    if (validate_clock_timer(Timer) == -1) {
	return -1;
    }

    status = outb6430(
	descriptor,
	(r_TIMER_CLCK0_6430 + timer),
	(Divisor & 0xff)
    );
    if (status == -1) {
	return -1;
    }
    Divisor >>= 8;
    return outb6430(descriptor, (r_TIMER_CLCK0_6430 + timer), (Divisor & 0xff));
}


int
SetPacerClock6430(int descriptor, double clock, double *actual_p) {
    u_int32_t	divider;
    int		bits32;
    int		status;

    if ((clock > DM6430HR_8MHZ) || (clock <= 0.0)) {
	errno = EINVAL;
	return -1;
    }

    divider = DM6430HR_8MHZ / clock;

    bits32 = (divider & 0xFFFF0000) ? 0x100 : 0;

    if (moutw6430(descriptor, r_TRIGGER_6430, 0xFEFF, bits32) == -1) {
	return -1;
    }

    if (SelectTimerCounter6430(descriptor, DM6430HR_CLOCK_TC) == -1) {
	return -1;
    }
    status = ClockMode6430(descriptor, DM6430HR_CLK0, DM6430HR_CLK_MODE2);
    if (status == -1) {
	return -1;
    }

    if (bits32) {
	int		a, b, first = 0, second = 0;
	unsigned	m, min_m = -1U;

	status = ClockMode6430(descriptor, DM6430HR_CLK1, DM6430HR_CLK_MODE2);
	if (status == -1) {
	    return -1;
	}
	for (a = divider/2; a > 1; a--) {
	    if ((b = divider/a) > a)
		break;

	    m = divider - a * b;
	    if (m < min_m) {
		m = min_m;
		first = a;
		second = b;
	    }

	    if (m == 0)
		break;
	}

	status = ClockDivisor6430(descriptor, DM6430HR_CLK0, first);
	if (status == -1) {
	    return -1;
	}
	status = ClockDivisor6430(descriptor, DM6430HR_CLK1, second);
	if (status == -1) {
	    return -1;
	}
	*actual_p = ((double) DM6430HR_8MHZ / (double) (first * second));
	return 0;
    }

    status = ClockDivisor6430(descriptor, DM6430HR_CLK0, divider);
    if (status == -1) {
	return -1;
    }
    *actual_p = ((double) DM6430HR_8MHZ / (double) divider);
    return 0;
}


int
SetBurstClock6430(int descriptor, double BurstRate, double *actual_p) {
    int			status;
    unsigned int	divisor;

    if (SelectTimerCounter6430(descriptor, DM6430HR_CLOCK_TC) == -1) {
	return -1;
    }
    status = ClockMode6430(descriptor, DM6430HR_CLK2, DM6430HR_CLK_MODE2);
    if (status == -1) {
	return -1;
    }
    status = ClockDivisor6430(
	descriptor,
	DM6430HR_CLK2,
	divisor = DM6430HR_8MHZ / BurstRate
    );
    if (status == -1) {
	return -1;
    }
    *actual_p = ((double) DM6430HR_8MHZ / (double) divisor);
    return 0;
}


int
SetUserClock6430(
    int descriptor,
    enum DM6430HR_CLK Timer,
    double InputRate,
    double OutputRate,
    double *actual_p
) {
    int			status;
    unsigned int	divisor; 

    if (validate_clock_timer(Timer) == -1) {
	errno = EINVAL;
	return -1;
    }

    if (SelectTimerCounter6430(descriptor, DM6430HR_USER_TC) == -1) {
	return -1;
    }
    status = ClockMode6430(descriptor, Timer, DM6430HR_CLK_MODE2);
    if (status == -1) {
	return -1;
    }
    status = ClockDivisor6430(
	descriptor,
	Timer,
	divisor = InputRate / OutputRate
    );
    if (status == -1) {
	return -1;
    }

    *actual_p = (InputRate / (double) divisor);
    return 0;
}


int
ReadTimerCounter6430(
    int descriptor,
    enum DM6430HR_CLK_SEL Timer,
    enum DM6430HR_CLK Clock,
    u_int16_t *counter_value_p
) {
    int		clk = (Clock & 0x3) << 1;
    int		status;
    u_int8_t	low_byte, high_byte;

    if (validate_clock_timer(Clock) == -1) {
	return -1;
    }

    if (validate_clock_select(Timer) == -1) {
	return -1;
    }

    if (SelectTimerCounter6430(descriptor, Timer) == -1) {
	return -1;
    }
    status = outb6430(descriptor, r_TIMER_CTRL_6430, (clk << 5));
    if (status == -1) {
	return -1;
    }
    status = inb6430(descriptor, (r_TIMER_CLCK0_6430 + clk), &low_byte);
    if (status == -1) {
	return -1;
    }
    status = inb6430(descriptor, (r_TIMER_CLCK0_6430 + clk), &high_byte);
    if (status == -1) {
	return -1;
    }

    *counter_value_p = (low_byte | (high_byte << 8));
    return 0;
}


int
DoneTimer6430(int descriptor) {
    int	status;

    if (SelectTimerCounter6430(descriptor, DM6430HR_USER_TC) == -1) {
	return -1;
    }
    status = ClockMode6430(descriptor, DM6430HR_CLK0, DM6430HR_CLK_MODE2);
    if (status == -1) {
	return -1;
    }
    status = ClockMode6430(descriptor, DM6430HR_CLK1, DM6430HR_CLK_MODE2);
    if (status == -1) {
	return -1;
    }
    status = ClockDivisor6430(descriptor, DM6430HR_CLK0, 2);
    if (status == -1) {
	return -1;
    }
    return ClockDivisor6430(descriptor, DM6430HR_CLK1, 2);
}


int
LoadADSampleCounter6430(int descriptor, u_int16_t NumOfSamples) {
    int		status;
    u_int16_t	dummy;

    if (SelectTimerCounter6430(descriptor, DM6430HR_USER_TC) == -1) {
	return -1;
    }
    status = ClockMode6430(descriptor, DM6430HR_CLK2, DM6430HR_CLK_MODE2);
    if (status == -1) {
	return -1;
    }
    status = ClockDivisor6430(descriptor, DM6430HR_CLK2, NumOfSamples);
    if (status == -1) {
	return -1;
    }

    /*
     * Read the Load A/D Sample Counter twice, which corrects the count
     * sequence (which is off by two pulses until corrected)
     */

    status = inw6430(descriptor, r_LOAD_AD_SAMPLE_COUNT_6430, &dummy);
    if (status == -1) {
	return -1;
    }
    return inw6430(descriptor, r_LOAD_AD_SAMPLE_COUNT_6430, &dummy);
}


int
DIOSelectRegister6430(int descriptor, enum DM6430HR_REG_SEL Select) {
    switch (Select) {
	case DM6430HR_REG_CLEAR:
	case DM6430HR_REG_DIR:
	case DM6430HR_REG_MASK:
	case DM6430HR_REG_CMP:
	    break;

	default:
	    errno = EINVAL;
	    return -1;
	    break;
    }

    return moutb6430(descriptor, r_DIO_MODE_6430, 0xFC, Select);
}


int
DIOClearChip6430(int descriptor) {
    if (DIOSelectRegister6430(descriptor, DM6430HR_REG_CLEAR) == -1) {
	return -1;
    }
    return outb6430(descriptor, r_DIO_CLEAR_6430, 0);
}


int
DIOClearIrq6430(int descriptor) {
    u_int8_t	dummy;

    if (DIOSelectRegister6430(descriptor, DM6430HR_REG_CLEAR) == -1) {
	return -1;
    }
    return inb6430(descriptor, r_DIO_CLEAR_6430, &dummy);
} 


int
DIOEnableIrq6430(int descriptor, int Enable) {
    u_int8_t	enable_mask = 0x00;

    if (Enable != 0) {
	enable_mask |= (1 << 4);
    }
    return moutb6430(descriptor, r_DIO_MODE_6430, 0xEF, enable_mask);
}


int
DIOSetPort1Direction6430(int descriptor, int Direction) {
    u_int8_t	direction_mask = 0x00;

    if (Direction != 0) {
	direction_mask |= (1 << 2);
    }
    return moutb6430(descriptor, r_DIO_MODE_6430, 0xFB, direction_mask);
}


int
DIOSetPort0Direction6430(int descriptor, u_int8_t Direction) {
    if (DIOSelectRegister6430(descriptor, DM6430HR_REG_DIR) == -1) {
	return -1;
    }
    return outb6430(descriptor, r_DIO_PORT_DIR_6430, Direction);
}


int
DIOLoadMask6430(int descriptor, u_int8_t Mask) {
    if (DIOSelectRegister6430(descriptor, DM6430HR_REG_MASK) == -1) {
	return -1;
    }
    return outb6430(descriptor, r_DIO_PORT_MASK_6430, Mask);
}


int
DIOLoadCompare6430(int descriptor, u_int8_t Compare) {
    if (DIOSelectRegister6430(descriptor, DM6430HR_REG_CMP) == -1) {
	return -1;
    }
    return outb6430(descriptor, r_DIO_PORT_COMP_6430, Compare);
}


int
DIORead6430(int descriptor, enum DM6430HR_DIO Port, u_int8_t *digital_data_p) {
    if (validate_dio_port(Port) == -1) {
	return -1;
    }

    return inb6430(
	descriptor,
	(r_DIO_PORT_0_6430 + ((Port & 1) << 1)),
	digital_data_p
    );
}


int
DIOReadCompareRegister6430(int descriptor, u_int8_t *register_value_p) {
    if (DIOSelectRegister6430(descriptor, DM6430HR_REG_CMP) == -1) {
	return -1;
    }
    return inb6430(descriptor, r_DIO_PORT_COMP_6430, register_value_p);
}


int
DIOSelectClock6430(int descriptor, enum DM6430HR_CLK_SEL Clock) {
    if (validate_clock_select(Clock) == -1) {
	return -1;
    }

    return moutb6430(descriptor, r_DIO_MODE_6430, 0xDF, Clock << 5);
}


int
DIOSelectIrqMode6430(int descriptor, enum DM6430HR_DIO_IRQ IrqMode) {
    switch (IrqMode) {
	case DM6430HR_DIO_IRQ_EVENT:
	case DM6430HR_DIO_IRQ_MATCH:
	    break;

	default:
	    errno = EINVAL;
	    return -1;
	    break;
    }

    return moutb6430(descriptor, r_DIO_MODE_6430, 0xF7, IrqMode << 3);
}


int
DIOWrite6430(int descriptor, enum DM6430HR_DIO Port, u_int8_t Data) {
    if (validate_dio_port(Port) == -1) {
	return -1;
    }

    return outb6430(descriptor, r_DIO_PORT_0_6430 + ((Port & 1) << 1), Data);
}


int
DIOReadStatus6430(int descriptor, u_int8_t *status_p) {
    int		status;
    u_int8_t	dio_status;

    status = inb6430(descriptor, r_DIO_STATUS_6430, &dio_status);
    if (status != -1) {
	*status_p = dio_status;
    }
    return status;
}


int
DIOIsChipIrq6430(int descriptor, int *interrupt_generated_p) {
    int		status;
    u_int8_t	dio_status;

    status = DIOReadStatus6430(descriptor, &dio_status);
    if (status != -1) {
	*interrupt_generated_p = (dio_status & DIO_STATUS_IRQ_STATUS);
    }
    return status;
}


int
DIOIsChipStrobe6430(int descriptor, int *strobe_occurred_p) {
    int		status;
    u_int8_t	dio_status;

    status = DIOReadStatus6430(descriptor, &dio_status);
    if (status != -1) {
	*strobe_occurred_p = (dio_status & DIO_STATUS_STROBE_STATUS);
    }
    return status;
}


int
DIOIsChipSystemClock6430(int descriptor, int *system_clock_p) {
    int		status;
    u_int8_t	dio_status;

    status = DIOReadStatus6430(descriptor, &dio_status);
    if (status != -1) {
	*system_clock_p = !(dio_status & DIO_STATUS_SAMPLE_CLOCK);
    }
    return status;
}


int
DIOIsChipIRQEnabled6430(int descriptor, int *irq_enabled_p) {
    int		status;
    u_int8_t	dio_status;

    status = DIOReadStatus6430(descriptor, &dio_status);
    if (status != -1) {
	*irq_enabled_p = (dio_status & DIO_STATUS_IRQ_ENABLE);
    }
    return status;
}


int
DIOIsChipIRQEventMode6430(int descriptor, int *irq_event_p) {
    int		status;
    u_int8_t	dio_status;

    status = DIOReadStatus6430(descriptor, &dio_status);
    if (status != -1) {
	*irq_event_p = !(dio_status & DIO_STATUS_IRQ_MODE);
    }
    return status;
}


int
DIOIsChipPort1Output6430(int descriptor, int *port1_output_p) {
    int		status;
    u_int8_t	dio_status;

    status = DIOReadStatus6430(descriptor, &dio_status);
    if (status != -1) {
	*port1_output_p = (dio_status & DIO_STATUS_PORT1_DIRECTION);
    }
    return status;
}