📄 main.s
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.module main.c
.area text(rom, con, rel)
.dbfile C:\AVR\AT-Modem__PPP__UDP__IC\main.c
.dbfunc e SendDetails _SendDetails fV
; w -> R20,R21
.even
_SendDetails::
xcall push_gset1
sbiw R28,4
.dbline -1
.dbline 70
; // This program tests the ppp routine and shows how to use it
;
; /*
; * Copyright (C) 2003-2004 by Clive Moss All rights reserved.
; *
; * Help & Contributions from D.J.Armstrong
;
; * Redistribution and use in source and binary forms, with or without
; * modification, are permitted provided that the following conditions
; * are met:
; *
; * 1. Redistributions of source code must retain the above copyright
; * notice, this list of conditions and the following disclaimer.
; * 2. Redistributions in binary form must reproduce the above copyright
; * notice, this list of conditions and the following disclaimer in the
; * documentation and/or other materials provided with the distribution.
; * 3. Neither the name of the copyright holders nor the names of
; * contributors may be used to endorse or promote products derived
; * from this software without specific prior written permission.
; *
; * THIS SOFTWARE IS PROVIDED BY CLIVE MOSS 'AS IS' AND ANY EXPRESS OR
; * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
; * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
; * ARE DISCLAIMED.
; * IN NO EVENT SHALL CLIVE MOSS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
; * INDIRECT, INCIDENTAL,SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
; * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
; * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
; * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
; * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
; * SUCH DAMAGE.
; */
;
; //#ifdef CPU_eZ8
; // #pragma stkck // enable stack checking
; //#endif
;
; #include "common.h"
;
; #ifdef CPU_eZ8
; #include <eZ8.h>
; #endif
;
; #ifdef CPU_ATmega128
; #include <iom128v.h>
; #include <macros.h>
; #endif
;
; #include <stdio.h>
; #include <string.h>
; #include <stdlib.h>
; #include <ctype.h>
; //#include <spi.h>
;
; #include "main.h"
; #include "common.h"
; #include "fcs.h"
; #include "at.h"
; #include "ppp.h"
; #include "ip.h"
;
; #ifdef IncludeTCP
; #include "tcp.h"
; #endif
;
; // *********************************************************************************
;
; void SendDetails(void)
; {
.dbline 73
; u16 w;
;
; if (!SendConsoleRStr(Str3)) return;
ldi R16,<_Str3
ldi R17,>_Str3
xcall _SendConsoleRStr
tst R16
brne L2
.dbline 73
xjmp L1
L2:
.dbline 75
;
; if (!SendConsoleRStr(VersionStr)) return;
ldi R16,<_VersionStr
ldi R17,>_VersionStr
xcall _SendConsoleRStr
tst R16
brne L4
.dbline 75
xjmp L1
L4:
.dbline 76
; sprintf((char*)ScratchPad, "%u.%02x\n", Version >> 8, Version & 0xff);
ldi R30,<_Version
ldi R31,>_Version
lpm R0,Z+
lpm R1,Z
movw R30,R0
andi R31,0
std y+3,R31
std y+2,R30
ldi R30,<_Version
ldi R31,>_Version
lpm R0,Z+
lpm R1,Z
movw R30,R0
mov R30,R31
clr R31
std y+1,R31
std y+0,R30
ldi R18,<L6
ldi R19,>L6
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _sprintf
.dbline 77
; if (!SendConsoleStr((char*)ScratchPad)) return;
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _SendConsoleStr
tst R16
brne L7
.dbline 77
xjmp L1
L7:
.dbline 79
;
; if (!SendConsoleRStr(Title)) return;
ldi R16,<_Title
ldi R17,>_Title
xcall _SendConsoleRStr
tst R16
brne L9
.dbline 79
xjmp L1
L9:
.dbline 80
; if (!SendConsoleRStr(Date)) return;
ldi R16,<_Date
ldi R17,>_Date
xcall _SendConsoleRStr
tst R16
brne L11
.dbline 80
xjmp L1
L11:
.dbline 85
;
; // ************
;
; #ifdef CPU_ATmega128
; if (!SendConsoleStr("\nUnit ID: ")) return;
ldi R16,<L15
ldi R17,>L15
xcall _SendConsoleStr
tst R16
brne L13
.dbline 85
xjmp L1
L13:
.dbline 86
; if (Get_UnitID((char*)ScratchPad))
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _Get_UnitID
tst R16
breq L16
.dbline 87
; {
.dbline 88
; if (!SendConsoleStr(ScratchPad)) return;
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _SendConsoleStr
tst R16
brne L18
.dbline 88
xjmp L1
L18:
.dbline 89
; if (!SendConsoleStr("\n")) return;
ldi R16,<L22
ldi R17,>L22
xcall _SendConsoleStr
tst R16
brne L17
.dbline 89
xjmp L1
X0:
.dbline 90
; }
L16:
.dbline 92
; else
; {
.dbline 93
; if (!SendConsoleStr("Invalid\n")) return;
ldi R16,<L25
ldi R17,>L25
xcall _SendConsoleStr
tst R16
brne L23
.dbline 93
xjmp L1
L23:
.dbline 94
; }
L17:
.dbline 99
; #endif
;
; // ************
;
; sprintf((char*)ScratchPad, "\nLast reset reason: %02X", LastResetReason);
lds R2,_LastResetReason
clr R3
std y+1,R3
std y+0,R2
ldi R18,<L26
ldi R19,>L26
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _sprintf
.dbline 109
;
; #ifdef CPU_eZ8
; if (LastResetReason & 0x80) strcat((char*)ScratchPad, " POR");
; if (LastResetReason & 0x40) strcat((char*)ScratchPad, " STOP");
; if (LastResetReason & 0x20) strcat((char*)ScratchPad, " WD");
; if (LastResetReason & 0x10) strcat((char*)ScratchPad, " EXT");
; #endif
;
; #ifdef CPU_ATmega128
; if (LastResetReason & 0x10) strcat((char*)ScratchPad, " JTAG");
lds R2,_LastResetReason
sbrs R2,4
rjmp L27
.dbline 109
ldi R18,<L29
ldi R19,>L29
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _strcat
L27:
.dbline 110
; if (LastResetReason & 0x08) strcat((char*)ScratchPad, " WD");
lds R2,_LastResetReason
sbrs R2,3
rjmp L30
.dbline 110
ldi R18,<L32
ldi R19,>L32
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _strcat
L30:
.dbline 111
; if (LastResetReason & 0x04) strcat((char*)ScratchPad, " BRN-OUT");
lds R2,_LastResetReason
sbrs R2,2
rjmp L33
.dbline 111
ldi R18,<L35
ldi R19,>L35
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _strcat
L33:
.dbline 112
; if (LastResetReason & 0x02) strcat((char*)ScratchPad, " EXT");
lds R2,_LastResetReason
sbrs R2,1
rjmp L36
.dbline 112
ldi R18,<L38
ldi R19,>L38
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _strcat
L36:
.dbline 113
; if (LastResetReason & 0x01) strcat((char*)ScratchPad, " POR");
lds R2,_LastResetReason
sbrs R2,0
rjmp L39
.dbline 113
ldi R18,<L41
ldi R19,>L41
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _strcat
L39:
.dbline 116
; #endif
;
; strcat((char*)ScratchPad, "\n");
ldi R18,<L22
ldi R19,>L22
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _strcat
.dbline 117
; if (!SendConsoleStr((char*)ScratchPad)) return;
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _SendConsoleStr
tst R16
brne L42
.dbline 117
xjmp L1
L42:
.dbline 124
;
; // ************
; // test the sram
;
; #ifdef CPU_ATmega128
;
; if (!SendConsoleStr("\nSRAM: ")) return;
ldi R16,<L46
ldi R17,>L46
xcall _SendConsoleStr
tst R16
brne L44
.dbline 124
xjmp L1
L44:
.dbline 126
;
; w = SRAM_Test();
xcall _SRAM_Test
movw R20,R16
.dbline 127
; if (w == 0xffff)
cpi R16,255
ldi R30,255
cpc R17,R30
brne L47
.dbline 128
; {
.dbline 129
; if (!SendConsoleStr("OK\n")) return;
ldi R16,<L51
ldi R17,>L51
xcall _SendConsoleStr
tst R16
brne L48
.dbline 129
xjmp L1
X1:
.dbline 130
; }
L47:
.dbline 132
; else
; {
.dbline 133
; sprintf(ScratchPad, "%04X\n", w);
std y+1,R21
std y+0,R20
ldi R18,<L52
ldi R19,>L52
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _sprintf
.dbline 134
; if (!SendConsoleStr(ScratchPad)) return;
ldi R16,<_ScratchPad
ldi R17,>_ScratchPad
xcall _SendConsoleStr
tst R16
brne L53
.dbline 134
xjmp L1
L53:
.dbline 135
; }
L48:
.dbline 142
ldi R16,<_PPP_ModeStr
ldi R17,>_PPP_ModeStr
xcall _SendConsoleRStr
tst R16
brne L55
.dbline 142
L55:
.dbline -2
L1:
adiw R28,4
xcall pop_gset1
.dbline 0 ; func end
ret
.dbsym r w 20 s
.dbend
.area vector(rom, abs)
.org 48
jmp _timer1_compa_isr
.area text(rom, con, rel)
.dbfile C:\AVR\AT-Modem__PPP__UDP__IC\main.c
.dbfunc e timer1_compa_isr _timer1_compa_isr fV
.even
_timer1_compa_isr::
.dbline -1
.dbline 165
;
; #endif
;
; // ************
;
; #ifdef Debug
; if (!SendConsoleRStr(PPP_ModeStr)) return;
; #endif
; }
;
; // *********************************************************************************
; // Test button Interrupt routine
;
; #ifdef CPU_eZ8
;
; #pragma interrupt
; void isr_C0(void)
; {
;
; }
;
; #endif
;
; // *********************************************************************************
; // 10ms timer interrupt routine
;
; #ifdef CPU_ATmega128
; #pragma interrupt_handler timer1_compa_isr:13
; void timer1_compa_isr(void)
; { // alternative more accurate timer counter option
.dbline -2
L57:
.dbline 0 ; func end
reti
.dbend
.area vector(rom, abs)
.org 56
jmp _isr_timer1_ovf
.area text(rom, con, rel)
.dbfile C:\AVR\AT-Modem__PPP__UDP__IC\main.c
.dbfunc e isr_timer1_ovf _isr_timer1_ovf fV
; w -> R22,R23
; i -> R20,R21
.even
_isr_timer1_ovf::
xcall push_lset
xcall push_gset2
sbiw R28,1
.dbline -1
.dbline 178
; // compare occured TCNT1=OCR1A
; }
; #endif
;
; #ifdef CPU_eZ8
; #pragma interrupt
; void isr_timer0(void)
; #endif
; #ifdef CPU_ATmega128
; #pragma interrupt_handler isr_timer1_ovf:15
; void isr_timer1_ovf(void)
; #endif
; { // 10ms timer interrupt
.dbline 186
; register u16 i, w; //
;
; // *************************
;
; #ifdef CPU_ATmega128
; // w = TCNT1L; // read the current counter low byte
; // w |= ((u16)TCNT1H) << 8; // read the current counter low byte
; w = TCNT1; // read the current count - depends how long it took to get here as to what we reload it with
in R22,0x2c
in R23,0x2d
.dbline 187
; w += TimerIntSpeed + 3; // update
subi R22,253 ; offset = 56323
sbci R23,35
.dbline 188
; TCNT1 = w; // reload counter
out 0x2d,R23
out 0x2c,R22
.dbline 195
; // TCNT1H = (u8)(w >> 8); // reload counter high byte
; // TCNT1L = (u8)w; // reload counter low byte
; #endif
;
; // *************************
;
; TimerIntCounter++; // update counter
lds R24,_TimerIntCounter
subi R24,255 ; addi 1
sts _TimerIntCounter,R24
.dbline 197
;
; Random32 = UpdateFCS_32(Random32, TimerIntCounter); // update the 32-bit random number
lds R2,_TimerIntCounter
std y+0,R2
lds R18,_Random32+2
lds R19,_Random32+2+1
lds R16,_Random32
lds R17,_Random32+1
xcall _UpdateFCS_32
sts _Random32+1,R17
sts _Random32,R16
sts _Random32+2+1,R19
sts _Random32+2,R18
.dbline 205
;
; // *************************
; // read the ADC if it's complete - then start the next conversion
; // this way of doing it is not exactly the fastest way (1 conversion per 20ms), but it's easy
; // and more than fast enough for monitoring battery voltage etc
;
; #ifdef CPU_ATmega128
; if (!(ADCSRA & (1<<ADSC))) // conversion complete ?
sbic 0x6,6
rjmp L59
.dbline 206
; { // yes
.dbline 207
; if (Flags1 & (1<<Flags1_ADC)) //
lds R2,_Flags1
sbrs R2,6
rjmp L61
.dbline 208
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