📄 common.lis
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002E ; w -> R20,R21
002E ; pnter -> R16,R17
.even
002E _u16_Get::
002E 0E940000 xcall push_gset2
0032 .dbline -1
0032 .dbline 268
0032 ; #endif
0032 ; }
0032 ;
0032 ; u16 u16_Get(volatile u16 *pnter)
0032 ; {
0032 .dbline 275
0032 ; #ifdef CPU_eZ8
0032 ; return *pnter; // read the value
0032 ; #endif
0032 ;
0032 ; #ifdef CPU_ATmega128
0032 ; u16 w;
0032 ; u8 savedSREG = SREG; // keep interrupt setting
0032 6FB7 in R22,0x3f
0034 .dbline 276
0034 ; Disable_Ints(); //
0034 F894 cli
0036 .dbline 277
0036 ; w = *pnter; // read the value
0036 F801 movw R30,R16
0038 4081 ldd R20,z+0
003A 5181 ldd R21,z+1
003C .dbline 278
003C ; SREG = savedSREG; // restore interrupt setting
003C 6FBF out 0x3f,R22
003E .dbline 279
003E ; return w; //
003E 8A01 movw R16,R20
0040 .dbline -2
0040 L8:
0040 0E940000 xcall pop_gset2
0044 .dbline 0 ; func end
0044 0895 ret
0046 .dbsym r savedSREG 22 c
0046 .dbsym r w 20 s
0046 .dbsym r pnter 16 ps
0046 .dbend
0046 .dbfunc e s16_Get _s16_Get fS
0046 ; savedSREG -> R22
0046 ; i -> R20,R21
0046 ; pnter -> R16,R17
.even
0046 _s16_Get::
0046 0E940000 xcall push_gset2
004A .dbline -1
004A .dbline 284
004A ; #endif
004A ; }
004A ;
004A ; s16 s16_Get(volatile s16 *pnter)
004A ; {
004A .dbline 291
004A ; #ifdef CPU_eZ8
004A ; return *pnter; // read the value
004A ; #endif
004A ;
004A ; #ifdef CPU_ATmega128
004A ; s16 i;
004A ; u8 savedSREG = SREG; // keep interrupt setting
004A 6FB7 in R22,0x3f
004C .dbline 292
004C ; Disable_Ints(); //
004C F894 cli
004E .dbline 293
004E ; i = *pnter; // read the value
004E F801 movw R30,R16
0050 4081 ldd R20,z+0
0052 5181 ldd R21,z+1
0054 .dbline 294
0054 ; SREG = savedSREG; // restore interrupt setting
0054 6FBF out 0x3f,R22
0056 .dbline 295
0056 ; return i; //
0056 8A01 movw R16,R20
0058 .dbline -2
0058 L9:
0058 0E940000 xcall pop_gset2
005C .dbline 0 ; func end
005C 0895 ret
005E .dbsym r savedSREG 22 c
005E .dbsym r i 20 S
005E .dbsym r pnter 16 pS
005E .dbend
005E .dbfunc e u32_Put _u32_Put fV
005E ; savedSREG -> R20
005E ; dw -> y+2
005E ; pnter -> R16,R17
.even
005E _u32_Put::
005E 3A93 st -y,r19
0060 2A93 st -y,r18
0062 0E940000 xcall push_gset1
0066 .dbline -1
0066 .dbline 300
0066 ; #endif
0066 ; }
0066 ;
0066 ; void u32_Put(volatile u32 *pnter, u32 dw)
0066 ; {
0066 .dbline 306
0066 ; #ifdef CPU_eZ8
0066 ; *pnter = dw; // set the value
0066 ; #endif
0066 ;
0066 ; #ifdef CPU_ATmega128
0066 ; u8 savedSREG = SREG; // keep interrupt setting
0066 4FB7 in R20,0x3f
0068 .dbline 307
0068 ; Disable_Ints(); //
0068 F894 cli
006A .dbline 308
006A ; *pnter = dw; // set the value
006A FE01 movw R30,R28
006C 2280 ldd R2,z+2
006E 3380 ldd R3,z+3
0070 4480 ldd R4,z+4
0072 5580 ldd R5,z+5
0074 F801 movw R30,R16
0076 2082 std z+0,R2
0078 3182 std z+1,R3
007A 4282 std z+2,R4
007C 5382 std z+3,R5
007E .dbline 309
007E ; SREG = savedSREG; // restore interrupt setting
007E 4FBF out 0x3f,R20
0080 .dbline -2
0080 L10:
0080 0E940000 xcall pop_gset1
0084 2296 adiw R28,2
0086 .dbline 0 ; func end
0086 0895 ret
0088 .dbsym r savedSREG 20 c
0088 .dbsym l dw 2 l
0088 .dbsym r pnter 16 pl
0088 .dbend
0088 .dbfunc e u32_Get _u32_Get fl
0088 ; savedSREG -> R20
0088 ; dw -> y+0
0088 ; pnter -> R16,R17
.even
0088 _u32_Get::
0088 0E940000 xcall push_gset1
008C 2497 sbiw R28,4
008E .dbline -1
008E .dbline 314
008E ; #endif
008E ; }
008E ;
008E ; u32 u32_Get(volatile u32 *pnter)
008E ; {
008E .dbline 321
008E ; #ifdef CPU_eZ8
008E ; return *pnter; // read the value
008E ; #endif
008E ;
008E ; #ifdef CPU_ATmega128
008E ; u32 dw;
008E ; u8 savedSREG = SREG; // keep interrupt setting
008E 4FB7 in R20,0x3f
0090 .dbline 322
0090 ; Disable_Ints(); //
0090 F894 cli
0092 .dbline 323
0092 ; dw = *pnter; // read the value
0092 F801 movw R30,R16
0094 2080 ldd R2,z+0
0096 3180 ldd R3,z+1
0098 4280 ldd R4,z+2
009A 5380 ldd R5,z+3
009C FE01 movw R30,R28
009E 2082 std z+0,R2
00A0 3182 std z+1,R3
00A2 4282 std z+2,R4
00A4 5382 std z+3,R5
00A6 .dbline 324
00A6 ; SREG = savedSREG; // restore interrupt setting
00A6 4FBF out 0x3f,R20
00A8 .dbline 325
00A8 ; return dw; //
00A8 FE01 movw R30,R28
00AA 0081 ldd R16,z+0
00AC 1181 ldd R17,z+1
00AE 2281 ldd R18,z+2
00B0 3381 ldd R19,z+3
00B2 .dbline -2
00B2 L11:
00B2 2496 adiw R28,4
00B4 0E940000 xcall pop_gset1
00B8 .dbline 0 ; func end
00B8 0895 ret
00BA .dbsym r savedSREG 20 c
00BA .dbsym l dw 0 l
00BA .dbsym r pnter 16 pl
00BA .dbend
00BA .dbfunc e EPROMWrite _EPROMWrite fV
00BA ; savedSREG -> R20
00BA ; Data -> R18
00BA ; Addr -> R16,R17
.even
00BA _EPROMWrite::
00BA 0E940000 xcall push_gset1
00BE .dbline -1
00BE .dbline 334
00BE ; #endif
00BE ; }
00BE ;
00BE ; // **************************************************************************
00BE ;
00BE ; #ifdef CPU_ATmega128
00BE ;
00BE ; void EPROMWrite(u16 Addr, u8 Data)
00BE ; {
00BE .dbline 337
00BE ; u8 savedSREG;
00BE ;
00BE ; savedSREG = SREG; // keep setting so the interrupt setting can be restored
00BE 4FB7 in R20,0x3f
00C0 .dbline 338
00C0 ; Disable_Ints(); //
00C0 F894 cli
00C2 .dbline 340
00C2 L13:
00C2 .dbline 340
00C2 L14:
00C2 .dbline 340
00C2 L16:
00C2 .dbline 340
00C2 ; //
00C2 ; for (; bit_is_set(EECR, EEWE); ); // wait for previous write to finish
00C2 E199 sbic 0x1c,1
00C4 FECF rjmp L13
00C6 .dbline 341
00C6 ; EEAR = Addr; // set address
00C6 1FBB out 0x1f,R17
00C8 0EBB out 0x1e,R16
00CA .dbline 342
00CA ; EEDR = Data; // set data
00CA 2DBB out 0x1d,R18
00CC .dbline 343
00CC ; sbi(EECR, EEMWE); // set "write enable" bit
00CC E29A sbi 0x1c,2
00CE .dbline 344
00CE ; sbi(EECR, EEWE); // set "write" bit
00CE E19A sbi 0x1c,1
00D0 .dbline 346
00D0 ; //
00D0 ; SREG = savedSREG; // restore SREG - ie, the CLI/SEI state
00D0 4FBF out 0x3f,R20
00D2 .dbline 347
00D2 ; EEAR = 0; //
00D2 2224 clr R2
00D4 3324 clr R3
00D6 3FBA out 0x1f,R3
00D8 2EBA out 0x1e,R2
00DA .dbline -2
00DA L12:
00DA 0E940000 xcall pop_gset1
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