📄 main.lis
字号:
0108 00E0 ldi R16,<_ScratchPad
010A 10E0 ldi R17,>_ScratchPad
010C 0E940000 xcall _strcat
0110 L33:
0110 .dbline 112
0110 ; if (LastResetReason & 0x02) strcat((char*)ScratchPad, " EXT");
0110 20900000 lds R2,_LastResetReason
0114 21FE sbrs R2,1
0116 06C0 rjmp L36
0118 .dbline 112
0118 20E0 ldi R18,<L38
011A 30E0 ldi R19,>L38
011C 00E0 ldi R16,<_ScratchPad
011E 10E0 ldi R17,>_ScratchPad
0120 0E940000 xcall _strcat
0124 L36:
0124 .dbline 113
0124 ; if (LastResetReason & 0x01) strcat((char*)ScratchPad, " POR");
0124 20900000 lds R2,_LastResetReason
0128 20FE sbrs R2,0
012A 06C0 rjmp L39
012C .dbline 113
012C 20E0 ldi R18,<L41
012E 30E0 ldi R19,>L41
0130 00E0 ldi R16,<_ScratchPad
0132 10E0 ldi R17,>_ScratchPad
0134 0E940000 xcall _strcat
0138 L39:
0138 .dbline 116
0138 ; #endif
0138 ;
0138 ; strcat((char*)ScratchPad, "\n");
0138 20E0 ldi R18,<L22
013A 30E0 ldi R19,>L22
013C 00E0 ldi R16,<_ScratchPad
013E 10E0 ldi R17,>_ScratchPad
0140 0E940000 xcall _strcat
0144 .dbline 117
0144 ; if (!SendConsoleStr((char*)ScratchPad)) return;
0144 00E0 ldi R16,<_ScratchPad
0146 10E0 ldi R17,>_ScratchPad
0148 0E940000 xcall _SendConsoleStr
014C 0023 tst R16
014E 09F4 brne L42
0150 .dbline 117
0150 2AC0 xjmp L1
0152 L42:
0152 .dbline 124
0152 ;
0152 ; // ************
0152 ; // test the sram
0152 ;
0152 ; #ifdef CPU_ATmega128
0152 ;
0152 ; if (!SendConsoleStr("\nSRAM: ")) return;
0152 00E0 ldi R16,<L46
0154 10E0 ldi R17,>L46
0156 0E940000 xcall _SendConsoleStr
015A 0023 tst R16
015C 09F4 brne L44
015E .dbline 124
015E 23C0 xjmp L1
0160 L44:
0160 .dbline 126
0160 ;
0160 ; w = SRAM_Test();
0160 0E940000 xcall _SRAM_Test
0164 A801 movw R20,R16
0166 .dbline 127
0166 ; if (w == 0xffff)
0166 0F3F cpi R16,255
0168 EFEF ldi R30,255
016A 1E07 cpc R17,R30
016C 39F4 brne L47
016E .dbline 128
016E ; {
016E .dbline 129
016E ; if (!SendConsoleStr("OK\n")) return;
016E 00E0 ldi R16,<L51
0170 10E0 ldi R17,>L51
0172 0E940000 xcall _SendConsoleStr
0176 0023 tst R16
0178 81F4 brne L48
017A .dbline 129
017A 15C0 xjmp L1
017C X1:
017C .dbline 130
017C ; }
017C L47:
017C .dbline 132
017C ; else
017C ; {
017C .dbline 133
017C ; sprintf(ScratchPad, "%04X\n", w);
017C 5983 std y+1,R21
017E 4883 std y+0,R20
0180 20E0 ldi R18,<L52
0182 30E0 ldi R19,>L52
0184 00E0 ldi R16,<_ScratchPad
0186 10E0 ldi R17,>_ScratchPad
0188 0E940000 xcall _sprintf
018C .dbline 134
018C ; if (!SendConsoleStr(ScratchPad)) return;
018C 00E0 ldi R16,<_ScratchPad
018E 10E0 ldi R17,>_ScratchPad
0190 0E940000 xcall _SendConsoleStr
0194 0023 tst R16
0196 09F4 brne L53
0198 .dbline 134
0198 06C0 xjmp L1
019A L53:
019A .dbline 135
019A ; }
019A L48:
019A .dbline 142
019A 00E0 ldi R16,<_PPP_ModeStr
019C 10E0 ldi R17,>_PPP_ModeStr
019E 0E940000 xcall _SendConsoleRStr
01A2 0023 tst R16
01A4 01F4 brne L55
01A6 .dbline 142
01A6 L55:
01A6 .dbline -2
01A6 L1:
01A6 2496 adiw R28,4
01A8 0E940000 xcall pop_gset1
01AC .dbline 0 ; func end
01AC 0895 ret
01AE .dbsym r w 20 s
01AE .dbend
.area vector(rom, abs)
.org 48
0030 0C94D700 jmp _timer1_compa_isr
.area text(rom, con, rel)
01AE .dbfile C:\AVR\AT-Modem__PPP__UDP__IC\main.c
01AE .dbfunc e timer1_compa_isr _timer1_compa_isr fV
.even
01AE _timer1_compa_isr::
01AE .dbline -1
01AE .dbline 165
01AE ;
01AE ; #endif
01AE ;
01AE ; // ************
01AE ;
01AE ; #ifdef Debug
01AE ; if (!SendConsoleRStr(PPP_ModeStr)) return;
01AE ; #endif
01AE ; }
01AE ;
01AE ; // *********************************************************************************
01AE ; // Test button Interrupt routine
01AE ;
01AE ; #ifdef CPU_eZ8
01AE ;
01AE ; #pragma interrupt
01AE ; void isr_C0(void)
01AE ; {
01AE ;
01AE ; }
01AE ;
01AE ; #endif
01AE ;
01AE ; // *********************************************************************************
01AE ; // 10ms timer interrupt routine
01AE ;
01AE ; #ifdef CPU_ATmega128
01AE ; #pragma interrupt_handler timer1_compa_isr:13
01AE ; void timer1_compa_isr(void)
01AE ; { // alternative more accurate timer counter option
01AE .dbline -2
01AE L57:
01AE .dbline 0 ; func end
01AE 1895 reti
01B0 .dbend
.area vector(rom, abs)
.org 56
0038 0C94D800 jmp _isr_timer1_ovf
.area text(rom, con, rel)
01B0 .dbfile C:\AVR\AT-Modem__PPP__UDP__IC\main.c
01B0 .dbfunc e isr_timer1_ovf _isr_timer1_ovf fV
01B0 ; w -> R22,R23
01B0 ; i -> R20,R21
.even
01B0 _isr_timer1_ovf::
01B0 0E940000 xcall push_lset
01B4 0E940000 xcall push_gset2
01B8 2197 sbiw R28,1
01BA .dbline -1
01BA .dbline 178
01BA ; // compare occured TCNT1=OCR1A
01BA ; }
01BA ; #endif
01BA ;
01BA ; #ifdef CPU_eZ8
01BA ; #pragma interrupt
01BA ; void isr_timer0(void)
01BA ; #endif
01BA ; #ifdef CPU_ATmega128
01BA ; #pragma interrupt_handler isr_timer1_ovf:15
01BA ; void isr_timer1_ovf(void)
01BA ; #endif
01BA ; { // 10ms timer interrupt
01BA .dbline 186
01BA ; register u16 i, w; //
01BA ;
01BA ; // *************************
01BA ;
01BA ; #ifdef CPU_ATmega128
01BA ; // w = TCNT1L; // read the current counter low byte
01BA ; // w |= ((u16)TCNT1H) << 8; // read the current counter low byte
01BA ; w = TCNT1; // read the current count - depends how long it took to get here as to what we reload it with
01BA 6CB5 in R22,0x2c
01BC 7DB5 in R23,0x2d
01BE .dbline 187
01BE ; w += TimerIntSpeed + 3; // update
01BE 6D5F subi R22,253 ; offset = 56323
01C0 7342 sbci R23,35
01C2 .dbline 188
01C2 ; TCNT1 = w; // reload counter
01C2 7DBD out 0x2d,R23
01C4 6CBD out 0x2c,R22
01C6 .dbline 195
01C6 ; // TCNT1H = (u8)(w >> 8); // reload counter high byte
01C6 ; // TCNT1L = (u8)w; // reload counter low byte
01C6 ; #endif
01C6 ;
01C6 ; // *************************
01C6 ;
01C6 ; TimerIntCounter++; // update counter
01C6 80910000 lds R24,_TimerIntCounter
01CA 8F5F subi R24,255 ; addi 1
01CC 80930000 sts _TimerIntCounter,R24
01D0 .dbline 197
01D0 ;
01D0 ; Random32 = UpdateFCS_32(Random32, TimerIntCounter); // update the 32-bit random number
01D0 20900000 lds R2,_TimerIntCounter
01D4 2882 std y+0,R2
01D6 20910200 lds R18,_Random32+2
01DA 30910300 lds R19,_Random32+2+1
01DE 00910000 lds R16,_Random32
01E2 10910100 lds R17,_Random32+1
01E6 0E940000 xcall _UpdateFCS_32
01EA 10930100 sts _Random32+1,R17
01EE 00930000 sts _Random32,R16
01F2 30930300 sts _Random32+2+1,R19
01F6 20930200 sts _Random32+2,R18
01FA .dbline 205
01FA ;
01FA ; // *************************
01FA ; // read the ADC if it's complete - then start the next conversion
01FA ; // this way of doing it is not exactly the fastest way (1 conversion per 20ms), but it's easy
01FA ; // and more than fast enough for monitoring battery voltage etc
01FA ;
01FA ; #ifdef CPU_ATmega128
01FA ; if (!(ADCSRA & (1<<ADSC))) // conversion complete ?
01FA 3699 sbic 0x6,6
01FC 42C0 rjmp L59
01FE .dbline 206
01FE ; { // yes
01FE .dbline 207
01FE ; if (Flags1 & (1<<Flags1_ADC)) //
01FE 20900000 lds R2,_Flags1
0202 26FE sbrs R2,6
0204 07C0 rjmp L61
0206 .dbline 208
0206 ; { //
0206 .dbline 209
0206 ; sbi(ADCSRA, ADSC); // Start the next conversion
0206 369A sbi 0x6,6
0208 .dbline 210
0208 ; Flags1 &= ~(1<<Flags1_ADC); // clear flag
0208 80910000 lds R24,_Flags1
020C 8F7B andi R24,191
020E 80930000 sts _Flags1,R24
0212 .dbline 211
0212 ; } //
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