📄 readme.txt
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Readme File for Code Example:
CE026 - dsPIC SMPS ADC Early Interrupt
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The dsPIC SMPS Family of Digital Signal Controllers feature an on-chip
10-bit 2 MSPS A/D Converter. The module is designed to trigger and convert
Analog Channels in pairs. The Early interrupt feature allows an interrupt
to be generated immediately after the first conversion of the pair is
completed.
This code example sets up ADC pair 0 (AN1,AN0) conversion to be triggered
by software trigger. The Early Interrupt feature is enabled. In this example,
the FRC with Hi-Range is set up to run at frequency of 14.55MHz. This will
result in Fcy = 29.1 MHz. The input clock to the ADC clock divider will be
Tcy = 34.364 nsec
Time required for one conversion = 721.64 nsec
The first end-of-conversion is detected by the ADC interrupt while the
second end-of-conversion is detected by polling the PEND0 bit in the ADPC0
register.Fadc = 232.8 MHz.
This file provides a brief description of files and folders provided
in the accompanying workspace.
This folder contains the following files:
1. This file
This file provides a description of the functionality demonstr-
ated by the example source code.
2. Push-Pull PWM.mcw, Push-Pull PWM.mcp
These are MPLAB
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