init.s

通过JTAG口烧写bin文件到ARM的flash

;************************************************************************************************
;Chinese Academy of Sciences, Institute of Automation
;File Name:	Init.s
;Description:	Write Flash 4Bytes 
;Author:		Li JuGuang
;Date:		2003-3-20
;************************************************************************************************
;Entry:	0x0040,0000
;Use mymap.txt config the SFR
;FLASH:	0x0000,0000~0x0040,0000    Total:4MB	1M~4M
;SDRAM: 	0x0040,0000~0x0140,0000	Total:16MB	4M~20M
;************************************************************************************************	
	GET	mem.a
	GET	casia1.a
	IMPORT Main
	AREA    Init,CODE,READONLY
	
	ENTRY
;*********************************	
;LED Display
;*********************************
	LDR	R1,=IOPMOD
	LDR	R0,=&ff
	STR	R0,[R1]
	LDR	R1,=IOPDATA
	LDR	R0,=&ff
	STR	R0,[R1]

;**************************************************
; Disable All Interrupt 
;disable interrupts in CPU and switch to SVC32 mode
;**************************************************
	MRS	r0, cpsr
	BIC	r0, r0, #MODE_MASK
	ORR	r0, r0, #SUP_MODE
	ORR 	r0, r0, #IBit
	ORR 	r0, r0, #FBit
	MSR	cpsr_cf, r0
					;disable individual interrupts in the interrupt controller
	LDR	r2, =INTMSK		;R2->interrupt controller
	MVN	r1, #0			;&FFFFFFFF
	STR	r1, [r2]			;disable all interrupt soucres
	LDR	r2, =INTPND		;R2->interrupt pend register.
	MVN	r1, #0					 ;&FFFFFFFF
	STR	r1, [r2]					 ;clear a

;*******************************************************
; Special Function Register Configuration for SYNC DRAM
;*******************************************************
	LDR	r0, =ASIC_BASE		 
	LDR	r1, =0xE7FFFF90 	; Start_addr = 0x3FF00000
	STR	r1, [r0]	  	; Cache,WB disable
                           		
;*******************************************************
; SDRAM System Initialize Data	
;*******************************************************
	LDR	r0, =0x3FF0000 + 0x3010
	LDR	r1, =rEXTDBWTH  
	LDR	r2, =rROMCON0    
	LDR	r3, =rROMCON1
	LDR	r4, =rROMCON2
	LDR	r5, =rROMCON3
	LDR	r6, =rROMCON4
	LDR	r7, =rROMCON5
	LDR	r8, =rSDRAMCON0
	LDR	r9, =rSDRAMCON1
	LDR	r10,=rSDRAMCON2
	LDR	r11,=rSDRAMCON3
	LDR	r12,=rSREFEXTCON
	STMIA	r0, {r1-r12}

;*************************************************
; Initialise STACK 
;*************************************************

	MRS	r0, cpsr
	BIC	r0, r0, #LOCKOUT | MODE_MASK
	ORR	r2, r0, #USR_MODE	

	ORR	r1, r0, #LOCKOUT | FIQ_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =FIQ_STACK

	ORR	r1, r0, #LOCKOUT | IRQ_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =IRQ_STACK

	ORR	r1, r0, #LOCKOUT | ABT_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =ABT_STACK

	ORR	r1, r0, #LOCKOUT | UDF_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =UDF_STACK

	ORR	r1, r0, #LOCKOUT | SUP_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =SUP_STACK   ; Change CPSR to SVC mode



;********************************************************
; Now change to user mode and set up user mode stack.
;********************************************************
	MRS     	r0, cpsr
	BIC	r0, r0, #LOCKOUT | MODE_MASK
	ORR	r1, r0, #USR_MODE
	MSR	cpsr_cf, r0
	LDR	sp, =USR_STACK

	BL	Main

	LDR	R1,=IOPDATA
	LDR	R0,=&0
	STR	R0,[R1]
	B	.
	END