fmd.cpp

It s wince for ARM9 evaluation board

    NF_CE_H();

    RELEASEMUTEX();
    return bRet;
}



//  FMD_WriteSector
//
//  Write dwNumPages pages to the startSectorAddr
//
BOOL FMD_WriteSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff, PSectorInfo pSectorInfoBuff,
                        DWORD dwNumSectors)
{
        DWORD   i;
        BOOL    bRet = TRUE;
      // DWORD   dwECCVal;
	volatile WORD	wrdata;
	DWORD	Mecc0, Mecc1;
	int NewSpareAddr = (512+16)/sizeof(WORD)*(startSectorAddr%4) + 512/sizeof(WORD);
	int NewDataAddr = (512+16)/sizeof(WORD)*(startSectorAddr%4);
	int NewSectorAddr = startSectorAddr/4;
  DEBUGMSG(1, (TEXT("FMD_WriteSector_IN %x!\n"),startSectorAddr));
#ifdef BOOT_LOADER
     //	EdbgOutputDebugString("FlashDrv!FMD!FMD_WriteSector:  0x%x \r\n", startSectorAddr);
#endif
    //  Sanity check
    //  BUGBUGBUG: I need to come back to support dwNumSectors > 1
    //
    if((!pSectorBuff && !pSectorInfoBuff) || dwNumSectors != 1) {
#ifdef BOOT_LOADER
        EdbgOutputDebugString("Invalid parameters!\r\n");
#else
        RETAILMSG(1, (TEXT("Invalid parameters!\n")));
#endif
#ifndef NOSYSCALL
        SetLastError(ERROR_INVALID_PARAMETER);
#endif
        return FALSE;
    }

	NF_Reset();

    if(!pSectorBuff) {
        //  If we are asked just to write the SectorInfo, we will do that separately
        bRet = NAND_WriteSectorInfo(startSectorAddr, pSectorInfoBuff);
		return bRet;			// Do not write the actual sector information...
    }

    GRABMUTEX();

   //s24A0IOP->rGPCON_L=(s24A0IOP->rGPCON_L & ~(0x3<<2))|(0x1<<2);// Setting as OUTPUT Mode
   //s24A0IOP->rGPDAT |=(1<<1);

    //  Initialize ECC register
    NF_RSTECC();
    NF_MECC_UnLock();

    //  Enable Chip
    NF_CE_L();

    //  Issue command
    NF_CMD(CMD_WRITE);

    //  Setup address
    NF_ADDR((NewDataAddr)&0xff);
    NF_ADDR(((NewDataAddr)>>8)&0xff);
    NF_ADDR((NewSectorAddr) & 0xff);
    NF_ADDR((NewSectorAddr >> 8) & 0xff);

    if (NEED_EXT_ADDR) {
        NF_ADDR((NewSectorAddr >> 16) & 0xff);
    }

    //  Special case to handle un-aligned buffer pointer.
    //
    if( ((DWORD) pSectorBuff) & 0x3) {
        //  Write the data
        for(i=0; i<SECTOR_SIZE/sizeof(WORD); i++) {
			wrdata = pSectorBuff[i*2+0];
			wrdata |= pSectorBuff[i*2+1]<<8;
            NF_DATA_W2(wrdata);
        }
    }
    else {
		WritePage512(pSectorBuff, pNFDATA);
//	    DWORD *bufPt=(DWORD *)pSectorBuff;
//		for(i=0;i<128;i++) {
//	        EdbgOutputDebugString("W: *bufPt = %x \r\n", *bufPt);
//			NF_DATA_W4(*bufPt++);	// Write one page to NFM from buffer
//		}
    }

    //  Read out the ECC value generated by HW
	NF_MECC_Lock();

	Mecc0 = READ_REGISTER_ULONG(pNFMECC0);
	Mecc1 = READ_REGISTER_ULONG(pNFMECC1);
//	EdbgOutputDebugString("FMD: WriteSector : pNFMECCD0: %x \r\n", Mecc0);
//	EdbgOutputDebugString("FMD: WriteSector : pNFMECCD1: %x \r\n", Mecc1);

	// Write the SectorInfo data to the media
	// NOTE: This hardware is odd: only a byte can be written at a time and it must reside in the
	//       upper byte of a USHORT.
	if(pSectorInfoBuff)
	{
        //  Write the first reserved field (DWORD)
        NF_DATA_W2( (pSectorInfoBuff->dwReserved1) & 0xffff );
        NF_DATA_W2( (pSectorInfoBuff->dwReserved1 >> 16) & 0xffff );
          wrdata = (WORD)(pSectorInfoBuff->bOEMReserved) | (((WORD)(pSectorInfoBuff->bBadBlock) << 8)&0xff00);
	 NF_DATA_W2( wrdata );
	 NF_DATA_W2(pSectorInfoBuff->wReserved2);
	}else
	{
		// Make sure we advance the Flash's write pointer (even though we aren't writing the SectorInfo data)
		for(i=0; i<sizeof(SectorInfo)/sizeof(WORD); i++)
		{
            NF_DATA_W2(0xffff);
		}
	}

//	EdbgOutputDebugString("FMD: WriteSector : pNFMECCD0: %x \r\n", Mecc0);
//	EdbgOutputDebugString("FMD: WriteSector : pNFMECCD1: %x \r\n", Mecc1);

    //  Write the ECC value to the flash
	
     NF_DATA_W2((WORD)((Mecc0) & 0xff)  | (WORD)((Mecc1<<8) & 0xff00));
     NF_DATA_W2((WORD)((Mecc0>>8) & 0xff) | (WORD)((Mecc1) & 0xff00));
     NF_DATA_W2((WORD)((Mecc0>>16) & 0xff) | (WORD)((Mecc1>>8) & 0xff00));
     NF_DATA_W2((WORD)((Mecc0>>24) & 0xff) | (WORD)((Mecc1>>16) & 0xff00));


     NF_CLEAR_RB();

    //  Finish up the write operation
    NF_CMD(CMD_WRITE2);

    //  Wait for RB
    NF_DETECT_RB();	 // Wait tR(max 12us)

    //  Check the status
    NF_CMD(CMD_STATUS);

    if(NF_DATA_R2() & STATUS_ERROR) {
#ifdef BOOT_LOADER
        EdbgOutputDebugString("FMD_WriteSector() ######## Error Programming page %d!\r\n", startSectorAddr);
#else
        RETAILMSG(1, (TEXT("FMD_WriteSector() ######## Error Programming page %d!\n"), startSectorAddr));
#endif

//s24A0IOP->rGPCON_L =  (s24A0IOP->rGPCON_L & ~(0x3<<2))|(0x3<<2);	//$ Set RTC_ALMINT		
        bRet = FALSE;
    }

    //  Disable the chip
    NF_CE_H();

//s24A0IOP->rGPCON_L =  (s24A0IOP->rGPCON_L & ~(0x3<<2))|(0x3<<2);	//$ Set RTC_ALMINT	

    RELEASEMUTEX();
    return bRet;
}

/*
 *  MarkBlockBad
 *
 *  Mark the block as a bad block. We need to write a 00 to the 517th byte
 */

BOOL MarkBlockBad(BLOCK_ID blockID)
{
    DWORD   dwStartPage = blockID << LOG_2_PAGES_PER_BLOCK;
    BOOL    bRet = TRUE;
#ifdef BOOT_LOADER
//	EdbgOutputDebugString("MarkBlockBad 0x%x \r\n", dwStartPage);
#endif
	
    GRABMUTEX();

    //  Enable chip
       NF_CE_L();
	NF_CLEAR_RB();

    //  Issue command
    //  We are dealing with spare area
    NF_CMD(CMD_WRITE);

    //  Set up address
    NF_ADDR((256+VALIDADDR/sizeof(WORD))&0xff);
    NF_ADDR(((256+VALIDADDR/sizeof(WORD))>>8)&0xff);
    NF_ADDR((dwStartPage) & 0xff);
    NF_ADDR((dwStartPage >> 8) & 0xff);
    if (NEED_EXT_ADDR) {
        NF_ADDR((dwStartPage >> 16) & 0xff);
    }

    NF_DATA_W2(BADBLOCKMARK);

    //  Copmlete the write
    NF_CMD(CMD_WRITE2);

    //  Wait for RB
    NF_DETECT_RB();	 // Wait tR(max 12us)
    //for(int i=0;i<10;i++); 

    //  Get the status
    NF_CMD(CMD_STATUS);

    if(NF_DATA_R2() &  STATUS_ERROR) {
        RETAILMSG(1, (TEXT("######## Failed to mark the block bad!\n")));
        bRet = FALSE;
    }

    //  Disable chip select
    NF_CE_H();

    RELEASEMUTEX();
    return bRet;
}

//
//  FMD_SetBlockStatus
//
//  Sets the status of a block.  Only implement for bad blocks for now.
//  Returns TRUE if no errors in setting.
//
BOOL FMD_SetBlockStatus(BLOCK_ID blockID, DWORD dwStatus)
{
       SECTOR_ADDR sectorAddr = blockID << LOG_2_PAGES_PER_BLOCK;
	BYTE bStatus = 0;

#ifdef BOOT_LOADER
//	EdbgOutputDebugString("FMD_SetBlockStatus 0x%x \r\n", sectorAddr);
#endif

    if(dwStatus & BLOCK_STATUS_BAD)
	{
        if(!MarkBlockBad (blockID))
        {
            return FALSE;
        }
    }

    // We don't currently support setting a block to read-only, so fail if request is
    // for read-only and block is not currently read-only.
    if(dwStatus & BLOCK_STATUS_READONLY)
	{
        if(!(FMD_GetBlockStatus(blockID) & BLOCK_STATUS_READONLY))
        {
            return FALSE;
        }
    }
    return TRUE;
}



#ifndef NOSYSCALL
//  We don't have to build the following interface functions for the
//  bootloader.
//

//  FMD_PowerUp
//
//  Performs any necessary powerup procedures...
//
VOID FMD_PowerUp(VOID)
{
        //  Reinit the NAND controller
        GRABMUTEX();

		s24A0SROM->rSROM_BW |=(1<<9);	
		WRITE_REGISTER_ULONG(pNFCONF, (1<<22)|(TECH<<16)|(TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4)|(0<<3)|(1<<2)|(0<<1)|(1<<0));
		WRITE_REGISTER_ULONG(pNFCONT, (0<<16)|(0<<15)|(0<<14)|(0<<13)|(0<<12)|(0<<11)|(1<<10)|(1<<9)|\
                   (0<<8)|(1<<7)|(0<<4)|(0<<3)|(0<<2)|(3<<0));
	
        RELEASEMUTEX();
        
        //  Reset the controller		
        //NF_Reset();
#ifdef CEDAR_ONLY
        // ++ CE 3.0 Specific Code. Not needed for 4.x +
        SetInterruptEvent(SYSINTR_POWERON);
        // -- CE 3.0 Specific Code. Not needed for 4.x +
#endif // CEDAR_ONLY
    
}


//  FMD_PowerDown
//
//  Performs any necessary powerdown procedures...
//
VOID FMD_PowerDown(VOID)
{
	RETAILMSG(1, (TEXT("FMD_Powerdown\r\n")));
}


//  FMD_OEMIoControl
//
//  Used for any OEM defined IOCTL operations
//
BOOL  FMD_OEMIoControl(DWORD dwIoControlCode, PBYTE pInBuf, DWORD nInBufSize,
                       PBYTE pOutBuf, DWORD nOutBufSize, PDWORD pBytesReturned)
{

	DEBUGMSG(1, (TEXT("FMD_OEMIoControl\r\n")));
    switch(dwIoControlCode)
    {
        case IOCTL_FMD_UPDATEXIP_BEGIN:
            g_bTakeMutex = TRUE;
            break;
            
        case IOCTL_FMD_UPDATEXIP_END:
            g_bTakeMutex = FALSE;
            break;
            
        default:
	        RETAILMSG(1, (TEXT("FMD::FMD_OEMIoControl = 0x%x\n"), dwIoControlCode));
            return FALSE;
    }
	return TRUE;
}

#endif // NOSYSCALL



//------------------------------- Private Interface (NOT used by the FAL) --------------------------

//  FMD_GetOEMReservedByte
//
//  Retrieves the OEM reserved byte (for metadata) for the specified physical sector.
//
//
BOOL FMD_GetOEMReservedByte(SECTOR_ADDR physicalSectorAddr, PBYTE pOEMReserved)
{
	int NewSpareAddr = (512+16)/sizeof(WORD)*(physicalSectorAddr%4) + 512/sizeof(WORD);
	int NewDataAddr = (512+16)/sizeof(WORD)*(physicalSectorAddr%4);
	int NewSectorAddr = physicalSectorAddr/4;

#ifdef BOOT_LOADER
	EdbgOutputDebugString("FMD_GetOEMReservedByte 0x%x \r\n", physicalSectorAddr);
#else
#endif
    GRABMUTEX();
    
    //  Enable chip select
    NF_CE_L();
    NF_CLEAR_RB();

    //  Issue command
    NF_CMD(CMD_READ);

    //  Set up address
    //   NF_ADDR(OEMADDR);
    NF_ADDR((256+OEMADDR/sizeof(WORD))&0xff);
    NF_ADDR(((256+OEMADDR/sizeof(WORD))>>8)&0xff);
    NF_ADDR((NewSectorAddr) & 0xff);
    NF_ADDR((NewSectorAddr >> 8) & 0xff);

    if (NEED_EXT_ADDR) {
        NF_ADDR((NewSectorAddr >> 16) & 0xff);
    }

	 NF_CMD(0x30);

    //  Wait for the ready bit
	 NF_DETECT_RB();	 // Wait tR(max 12us)

    //  Read the data
    *pOEMReserved = (BYTE) (NF_DATA_R2()&0xff);		// read and discard
  
    //  Disable chip select
    NF_CE_H();

    RELEASEMUTEX();
	return TRUE;

}


//  FMD_SetOEMReservedByte
//
//  Sets the OEM reserved byte (for metadata) for the specified physical sector.
//
BOOL FMD_SetOEMReservedByte(SECTOR_ADDR physicalSectorAddr, BYTE bOEMReserved)
{
    BOOL    bRet = TRUE;
	int NewSpareAddr = (512+16)/sizeof(WORD)*(physicalSectorAddr%4) + 512/sizeof(WORD);
	int NewDataAddr = (512+16)/sizeof(WORD)*(physicalSectorAddr%4);
	int NewSectorAddr = physicalSectorAddr/4;

#ifdef BOOT_LOADER
	EdbgOutputDebugString("FMD_SetOEMReservedByte 0x%x \r\n", physicalSectorAddr);
#else
#endif
    GRABMUTEX();

    //  Enable chip select
    NF_CE_L();
    NF_CLEAR_RB();

    //  Issue command
    NF_CMD(CMD_WRITE);

    //  Set up address
    NF_ADDR((256+OEMADDR/sizeof(WORD))&0xff);
    NF_ADDR(((256+OEMADDR/sizeof(WORD))>>8)&0xff);
    NF_ADDR((NewSectorAddr) & 0xff);
    NF_ADDR((NewSectorAddr >> 8) & 0xff);

    if (NEED_EXT_ADDR) {
        NF_ADDR((NewSectorAddr >> 16) & 0xff);
    }

    //  Write the data
    NF_DATA_W2(bOEMReserved);

    //  Complete the write
    NF_CMD(CMD_WRITE2);

    //  Wait for the ready bit
	NF_DETECT_RB();	 // Wait tR(max 12us)

    //  Read the status
    NF_CMD(CMD_STATUS);

    //  Check the status
    if(NF_DATA_R2() & STATUS_ERROR) {
        RETAILMSG(1, (TEXT("######## Failed to set OEM Reserved byte!\n")));
        bRet = FALSE;
    }

    //  Disable chip select
    NF_CE_H();

    RELEASEMUTEX();
    return bRet;
}

//---------------------------------------- Helper Functions ----------------------------------------

//  Interface function for testing purpose.
//
BOOL FMD_ReadSpare(DWORD dwStartPage, LPBYTE pBuff, DWORD dwNumPages)
{
  #ifdef BOOT_LOADER
	EdbgOutputDebugString("FMD_ReadSpare Not Support !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\r\n");
#else
	RETAILMSG(1, (TEXT("FMD_ReadSpare Not Support !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\r\n")));
#endif
    return FALSE;
}

void GRABMUTEX()
{
#ifdef NOSYSCALL
#ifndef BOOT_LOADER
    // we're in the kernel - always SC_WaitForMultiple
    SC_WaitForMultiple(1, &g_hMutex, TRUE, INFINITE);
#endif
#else
    if (g_bTakeMutex) {
        // we can do a normal WaitForSingleObject
        WaitForSingleObject(g_hMutex, INFINITE);
    }
#endif
}

void RELEASEMUTEX()
{
#ifdef NOSYSCALL
#ifndef BOOT_LOADER
    SC_ReleaseMutex(g_hMutex);
#endif
#else
    if (g_bTakeMutex) {
        ReleaseMutex(g_hMutex);
    }
#endif
}