fmd.cpp

It s wince for ARM9 evaluation board

    GRABMUTEX();
    s24A0SROM->rSROM_BW |=(1<<9);	
    WRITE_REGISTER_ULONG(pNFCONF, (1<<22)|(TECH<<16)|(TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4)|(0<<3)|(1<<2)|(0<<1)|(1<<0));//$TBD
  //             Advance,                                                                     Not support nCE ctl, 16bit, 1KB, 5step 
    WRITE_REGISTER_ULONG(pNFCONT, (0<<16)|(0<<15)|(0<<14)|(0<<13)|(0<<12)|(0<<11)|(1<<10)|(1<<9)|\
                   (0<<8)|(1<<7)|(0<<4)|(0<<3)|(1<<2)|(3<<0));
   //           LdStrAddr   illegalAccINT  LoadINT  StoreINT  RnBINT    TransMode  SpareECCLock MainECCLock
   //            initECC   Reg_nCE  PageSie Lock-tight Lock  Software Mode   
   NF_Reset();
   NF_CE_L();
   NF_CMD(CMD_READID);	
   NF_ADDR(0x0);
       for(i=0;i<10;i++); //wait tWB(100ns)////?????
   id1=NF_DATA_R();	// Maker code(K9S1208V:0xec)
   id2=NF_DATA_R();	// Devide code(K9S1208V:0x76)
   id3=NF_DATA_R();	// Maker code(K9S1208V:0xec)
   id4=NF_DATA_R();	// Devide code(K9S1208V:0x76)
   RETAILMSG(1, (TEXT("FMD::FMD_Init: id1=%x ;id2=%x ;id3=%x ;id4=%x \r\n"),id1,id2,id3,id4));	
   NF_CE_H();
   if(id2==0xCA) {}
   else{
    RETAILMSG(1, (TEXT("FMD::FMD_Init: WARNING !!K9K2G16UOM IS NOT OM THE BOARD OR CHIP IS CORRUPTED \n FMD DRIVER WILL NOT BE LOADED !!\r\n")));	
   goto ErrExit;    
   	}
   RELEASEMUTEX();
   NF_Reset();
   return (PVOID)pNFCONF;
   
ErrExit:
    FMD_Deinit((PVOID)pNFCONF);
    return 0;
}

//  FMD_Deinit
//
//  De-initialize the flash chip
//
BOOL    FMD_Deinit(PVOID hFMD)
{
	if((DWORD)hFMD != (DWORD)pNFCONF)
	{
		return FALSE;
	}

	// destroy the mutex
	if (g_hMutex)
	{
#ifdef NOSYSCALL
#ifndef BOOT_LOADER
        SC_CloseHandle(g_hMutex);
#endif
#else
        CloseHandle(g_hMutex);
#endif
	}

#ifndef NOSYSCALL
#ifdef NOBINFS
    //  We don't have to free pNFReg and clock register.
#ifdef CEDAR_ONLY
    // ++ CE 3.0 Specific Code. Not needed for 4.x +
    if (g_tblFastCall.UnRegisterBlockDrv) {
        g_tblFastCall.UnRegisterBlockDrv(g_tblFastCall.pContext, PowerOnCallback);
    }
    // -- CE 3.0 Specific Code. Not needed for 4.x +
#endif // CEDAR_ONLY

    //  Close the handle
    if (g_hUTLObject) {
        CloseHandle(g_hUTLObject);
    }
#else
    if(pNFReg) {
        VirtualFree(pNFReg, 0, MEM_RELEASE);
    }
#endif

#endif
    return TRUE;
}


//  FMD_GetInfo
//
//  Return the Flash information
//
BOOL    FMD_GetInfo(PFlashInfo pFlashInfo)
{
    pFlashInfo->flashType = NAND;

    //  OK, instead of reading it from the chip, we use the hardcoded
    //  numbers here.
    pFlashInfo->dwNumBlocks			= NUM_BLOCKS;
    pFlashInfo->wSectorsPerBlock	= PAGES_PER_BLOCK;
    pFlashInfo->wDataBytesPerSector = SECTOR_SIZE;
    pFlashInfo->dwBytesPerBlock		= (pFlashInfo->wSectorsPerBlock * pFlashInfo->wDataBytesPerSector); 
    return TRUE;
}

//  FMD_ReadSector
//
//  Read the content of the sector.
//
//  startSectorAddr: Starting page address
//  pSectorBuff  : Buffer for the data portion
//  pSectorInfoBuff: Buffer for Sector Info structure
//  dwNumSectors : Number of sectors
//

//typedef union _ECCRegVal
//{
//    DWORD   dwECCVal;
//    BYTE    bECCBuf[4];
//} ECCRegVal;

BOOL FMD_ReadSector(SECTOR_ADDR startSectorAddr, LPBYTE pSectorBuff,
                        PSectorInfo pSectorInfoBuff, DWORD dwNumSectors)
{
        DWORD       i;
       WORD eccbuff[4];
	volatile WORD		rddata;
	int NewSpareAddr = (512+16)/sizeof(WORD)*(startSectorAddr%4) + 512/sizeof(WORD);
	int NewDataAddr = (512+16)/sizeof(WORD)*(startSectorAddr%4);
	int NewSectorAddr = startSectorAddr/4;
	UINT8    *buff;
       buff=(UINT8 *)0xa8000000;
  
#ifdef BOOT_LOADER
//	EdbgOutputDebugString("FMD_ReadSector:  %x \r\n", startSectorAddr);
#else
#endif
    //  Sanity check
    if (!pSectorBuff && !pSectorInfoBuff || dwNumSectors > 1) {
#ifdef BOOT_LOADER
        EdbgOutputDebugString("Invalid parameters!\r\n");
#else
        RETAILMSG(1, (TEXT("Invalid parameters!\n")));
#endif
#ifndef NOSYSCALL
        SetLastError(ERROR_INVALID_PARAMETER);
#endif
        return FALSE;
    }

	NF_Reset();

    if(!pSectorBuff) {
        //  We are reading spare only
        NAND_ReadSectorInfo(startSectorAddr, pSectorInfoBuff);

        //  There is no ECC for the sector info, so the read always succeed.
        return TRUE;
    }
	GRABMUTEX();

	//  Initialize ECC register
	NF_RSTECC();
	NF_MECC_UnLock();

	//  Enable the chip
	NF_CE_L();
	NF_CLEAR_RB();

#ifdef AUTOLOAD


  NF_DISABLE_ALLMODE(); 
  NF_LDSTR_ADD(0);
  NF_LDSTR_SIZE(1);
  
  //  Issue command
  NF_CMD(CMD_READ);

 //  Set up address
 // NF_ADDR_(startSectorAddr<<8);	 
       NF_ADDR((NewDataAddr)&0xff);
       NF_ADDR(((NewDataAddr)>>8)&0xff);
	NF_ADDR((NewSectorAddr) & 0xff);
	NF_ADDR((NewSectorAddr >> 8) & 0xff);

	if (NEED_EXT_ADDR) {
	     NF_ADDR((NewSectorAddr >> 16) & 0xff);
	}

       NF_CMD(0x30);	// 2nd command

	NF_DETECT_RB();	 // Wait tR(max 12us)	
    
  NF_LD_START();
  NF_LDDONE_CHECK();
  NF_LDDONE_CLEAR();
  NF_DISABLE_ALLMODE(); 
  NF_SW_MODE();

  //copy data to Stepping stone 
     for(i=0; i<SECTOR_SIZE; i++) {
            		pSectorBuff[i] = *buff++;
        	}


#else
	//  Issue command
	NF_CMD(CMD_READ);
	//  Set up address
       //	NF_ADDR(0x00);
       //	NF_ADDR(0x00);
       NF_ADDR((NewDataAddr)&0xff);
       NF_ADDR(((NewDataAddr)>>8)&0xff);
	NF_ADDR((NewSectorAddr) & 0xff);
	NF_ADDR((NewSectorAddr >> 8) & 0xff);

	if (NEED_EXT_ADDR) {
	     NF_ADDR((NewSectorAddr >> 16) & 0xff);
	}

	NF_CMD(0x30);	// 2nd command

	NF_DETECT_RB();	 // Wait tR(max 12us)

	//  BUGBUG, because Media Player for Pocket PC sometimes pass us un-aligned buffer
	//  we have to waste cycle here to work around this problem
	if( ((DWORD) pSectorBuff) & 0x3) {
		for(i=0; i<SECTOR_SIZE/sizeof(WORD); i++) {
			rddata = (WORD) NF_DATA_R2();
			pSectorBuff[i*2+0] = (rddata & 0xff);
			pSectorBuff[i*2+1] = (rddata>>8 & 0xff);
		}
	}
	else {
		ReadPage512(pSectorBuff, pNFDATA);
      //DWORD *bufPt=(DWORD *)pSectorBuff;
      //for(i=0;i<128;i++) {
      //	*bufPt = NF_DATA_R4();	// Write one page to NFM from buffer
      //	   EdbgOutputDebugString("R: *bufPt = %x \r\n", *bufPt);
     //        *bufPt++;
     //}
    }

#endif
        //  Do the ECC thing here
        //  We read the ECC value from the ECC register pFNECC
	NF_MECC_Lock();

        //  Read the SectorInfo data
    if(pSectorInfoBuff) {
        //  Read the SectorInfo data (we only need to read first 8 bytes)
           pSectorInfoBuff->dwReserved1   = (DWORD) ((WORD)NF_DATA_R2());
           pSectorInfoBuff->dwReserved1 |= (DWORD) (((WORD) NF_DATA_R2()) << 16);
	    rddata = NF_DATA_R2();

       //EdbgOutputDebugString("FMD_ReadSector() SectorInfoBuff Read : rddata = 0x%x \r\n", rddata);

		//  OEM byte
		pSectorInfoBuff->bOEMReserved = (BYTE) (rddata & 0xff);

		//  Read the bad block mark
		pSectorInfoBuff->bBadBlock = (BYTE) ((rddata>>8) & 0xff);

		// Second reserved field (WORD)
	       //pSectorInfoBuff->wReserved2 = (WORD) ((rddata>>16) & 0xffff);
		pSectorInfoBuff->wReserved2 =NF_DATA_R2();
    }
    else {
        //  Advance the read pointer
        for(i=0; i<sizeof(SectorInfo)/sizeof(WORD); i++) {
//	        EdbgOutputDebugString("FMD_ReadSector() read and trash the data \r\n");
            rddata = (WORD) NF_DATA_R2();		// read and trash the data
//			rddata;
//	        EdbgOutputDebugString("FMD_ReadSector() rddata = 0x%x \r\n", rddata);
        }
    }

//	RELEASEMUTEX();
//	return TRUE;

//	EdbgOutputDebugString("FMD: ReadSector : pNFMECCD0: %x \r\n", READ_REGISTER_ULONG(pNFMECC0));
//	EdbgOutputDebugString("FMD: ReadSector : pNFMECCD1: %x \r\n", READ_REGISTER_ULONG(pNFMECC1));

    //  Verify the ECC values
    //
    //  Read the ECC buffer 8bytes
	for(i=0; i<4; i++) {
		eccbuff[i] = (WORD) NF_DATA_R2();
   //EdbgOutputDebugString("FMD_ReadSector() rddata = 0x%x \r\n", rddata);
    }

//	EdbgOutputDebugString("FMD: pNFMECCD0: %x \r\n", (DWORD)((eccBuf[5])<<24) | (DWORD)((eccBuf[1])<<16) | (DWORD)((eccBuf[4])<<8) | (DWORD)((eccBuf[0]&0xff)));
//	EdbgOutputDebugString("FMD: pNFMECCD1: %x \r\n", (DWORD)((eccBuf[7])<<24) | (DWORD)((eccBuf[3])<<16) | (DWORD)((eccBuf[6])<<8) | (DWORD)((eccBuf[2]&0xff)));

//	for(i=4; i<16; i++) {
//		rddata = (DWORD) NF_DATA_R4();
//	}


//	while(1);

    //  Copmare with the ECC generated from the HW
       WRITE_REGISTER_ULONG(pNFMECCData0,eccbuff[0]);
	WRITE_REGISTER_ULONG(pNFMECCData1,eccbuff[1]);
       WRITE_REGISTER_ULONG(pNFMECCData2,eccbuff[2]);
	WRITE_REGISTER_ULONG(pNFMECCData3,eccbuff[3]);

//	EdbgOutputDebugString("FMD: pNFESTAT0: %x \r\n", READ_REGISTER_ULONG(pNFESTAT0));
//	EdbgOutputDebugString("FMD: pNFESTAT1: %x \r\n", READ_REGISTER_ULONG(pNFESTAT1));
	
	NF_CE_H();

//	RELEASEMUTEX();
//	return TRUE;

	if (((READ_REGISTER_ULONG(pNFESTAT0)&0x3) == 0x0) &&((READ_REGISTER_ULONG(pNFESTAT1)&0x3) == 0x0)){
	}
	else {
#ifdef BOOT_LOADER
		EdbgOutputDebugString("FMD: ECC ERROR - Page #: 0x%x \r\n", startSectorAddr);
//		EdbgOutputDebugString("(%x:%x %x:%x %x:%x)\r\n", eccBuf[0], eccRegVal.bECCBuf[0], eccBuf[1], eccRegVal.bECCBuf[1], eccBuf[2], eccRegVal.bECCBuf[2]);
#else
		RETAILMSG(1, (TEXT("FMD: ECC ERROR - Page #: 0x%x \r\n"), startSectorAddr));
#endif
		RELEASEMUTEX();
		return FALSE;
	}

	RELEASEMUTEX();
	DEBUGMSG(1, (TEXT(" FMD_ReadSector_OUT2 :%x \n"),startSectorAddr));
	return TRUE;
}

//
//  IsBlockBad
//
//  Check to see if the given block is bad. A block is bad if the 517th byte on
//  the first or second page is not 0xff.
//
//  blockID:    The block address. We need to convert this to page address
//
//
BOOL IsBlockBad(BLOCK_ID blockID)
{
    DWORD   dwPageID = blockID << 6;
    BOOL    bRet = FALSE;
    BYTE    wFlag;

#ifdef BOOT_LOADER
//	EdbgOutputDebugString("IsBlockBad 0x%x \r\n", dwPageID);
#endif
    GRABMUTEX();

    //  Enable the chip
    NF_CE_L();
	NF_CLEAR_RB();

    //  Issue the command
    NF_CMD(CMD_READ);

    //  Set up address
    NF_ADDR((256+VALIDADDR/sizeof(WORD))&0xff);
    NF_ADDR(((256+VALIDADDR/sizeof(WORD))>>8)&0xff);
    NF_ADDR((dwPageID) & 0xff);
    NF_ADDR((dwPageID >> 8) & 0xff);

    if (NEED_EXT_ADDR) {
        NF_ADDR((dwPageID >> 16) & 0xff);
    }

	NF_CMD(0x30);

    //  Wait for Ready bit
	NF_DETECT_RB();	 // Wait tR(max 12us)

    //  Now get the byte we want
    wFlag = (BYTE)((NF_DATA_R2() & 0xff00)>>8);

    if(wFlag != 0xff) {
		RETAILMSG(1, (TEXT("FMD: IsBlockBad - Page #: 0x%x \r\n"), dwPageID));
        bRet = TRUE;
    }

    //  Disable the chip
    NF_CE_H();

    RELEASEMUTEX();
    return bRet;
}

//
//  FMD_GetBlockStatus
//
//  Returns the status of a block.  The status information is stored in the spare area of the first sector for
//  the respective block.
//
//  A block is BAD if the bBadBlock byte on the first page is not equal to 0xff.
//
DWORD FMD_GetBlockStatus(BLOCK_ID blockID)
{
    SECTOR_ADDR sectorAddr = blockID << 8;
    SectorInfo SI;
    DWORD dwResult = 0;

#ifdef BOOT_LOADER
//EdbgOutputDebugString("FMD_GetBlockStatus 0x%x \r\n", sectorAddr);
#endif

	if(!FMD_ReadSector(sectorAddr, NULL, &SI, 1))
	{
        return BLOCK_STATUS_UNKNOWN;
	}

    if(!(SI.bOEMReserved & OEM_BLOCK_READONLY))
	{
        dwResult |= BLOCK_STATUS_READONLY;
	}

    if(SI.bBadBlock != 0xFF)
	{
        dwResult |= BLOCK_STATUS_BAD;
	}
    return dwResult;
}




//  FMD_EraseBlock
//
//  Erase the given block
//
BOOL FMD_EraseBlock(BLOCK_ID blockID)
{
    BOOL    bRet = TRUE;
    DWORD   dwPageID = blockID << LOG_2_PAGES_PER_BLOCK;
	
    GRABMUTEX();

#ifdef BOOT_LOADER
//	EdbgOutputDebugString("FMD_EraseBlock blockID: 0x%x\r\n", blockID);
//	EdbgOutputDebugString("FMD_EraseBlock dwPageID: 0x%x\r\n", dwPageID);
#endif

#ifndef NOSYSCALL
	if(blockID < IMAGE_START_BLOCK)
	{
		bRet = FALSE;
		RELEASEMUTEX();
		return bRet;
	}
#endif


  // s24A0IOP->rGPCON_L=(s24A0IOP->rGPCON_L & ~(0x3<<2))|(0x1<<2);// Setting as OUTPUT Mode
   //s24A0IOP->rGPDAT |=(1<<1);

    //$ Lock Disable

    NF_LOCK_DISABLE();
   
    //  Enable the chip
    NF_CE_L();
	NF_CLEAR_RB();

    //  Issue command
    NF_CMD(CMD_ERASE);

    //  Set up address
    NF_ADDR((dwPageID) & 0xff);
    NF_ADDR((dwPageID >> 8) & 0xff);

    if (NEED_EXT_ADDR) {
        NF_ADDR((dwPageID >> 16) & 0xff);
    }

    //  Complete erase operation
    NF_CMD(CMD_ERASE2);

    //  Wait for ready bit
	NF_DETECT_RB();	 // Wait tR(max 12us)
    //for(i=0;i<1000;i++);

    //  Check the status
    NF_CMD(CMD_STATUS);

    if(NF_DATA_R2() & STATUS_ERROR) {
        RETAILMSG(1, (TEXT("######## Error Erasing block %d!\n"), blockID));
        bRet = FALSE;
    }