📄 csd_double_pwm_inverter.mdl
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Cell "SupportNonFinite"
Cell "SupportComplex"
Cell "SupportAbsoluteTime"
Cell "SupportContinuousTime"
Cell "SupportNonInlinedSFcns"
PropName "DisabledProps"
}
Version "1.2.0"
TargetFcnLib "ansi_tfl_tmw.mat"
TargetLibSuffix ""
TargetPreCompLibLocation ""
GenFloatMathFcnCalls "ANSI_C"
UtilityFuncGeneration "Auto"
GenerateFullHeader on
GenerateSampleERTMain off
GenerateTestInterfaces off
IsPILTarget off
ModelReferenceCompliant on
IncludeMdlTerminateFcn on
CombineOutputUpdateFcns off
SuppressErrorStatus off
IncludeFileDelimiter "Auto"
ERTCustomFileBanners off
SupportAbsoluteTime on
LogVarNameModifier "rt_"
MatFileLogging on
MultiInstanceERTCode off
SupportNonFinite on
SupportComplex on
PurelyIntegerCode off
SupportContinuousTime on
SupportNonInlinedSFcns on
EnableShiftOperators on
ParenthesesLevel "Nominal"
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
GenerateASAP2 off
}
PropName "Components"
}
}
hdlcoderui.hdlcc {
$ObjectID 11
Description "HDL Coder custom configuration component"
Version "1.2.0"
Name "HDL Coder"
Array {
Type "Cell"
Dimension 1
Cell ""
PropName "HDLConfigFile"
}
HDLCActiveTab "0"
}
PropName "Components"
}
Name "Configuration"
SimulationMode "normal"
CurrentDlgPage "Solver"
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
BlockParameterDefaults {
Block {
BlockType BusCreator
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Clock
DisplayTime off
}
Block {
BlockType Constant
}
Block {
BlockType DataTypeConversion
OutDataTypeMode "Inherit via back propagation"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
ConvertRealWorld "Real World Value (RWV)"
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Demux
Outputs "4"
DisplayOption "none"
BusSelectionMode off
}
Block {
BlockType DigitalClock
SampleTime "1"
}
Block {
BlockType DiscreteIntegrator
IntegratorMethod "Integration: Forward Euler"
gainval "1.0"
ExternalReset "none"
InitialConditionSource "internal"
InitialCondition "0"
InitialConditionMode "State and output"
SampleTime "1"
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow off
LimitOutput off
UpperSaturationLimit "inf"
LowerSaturationLimit "-inf"
ShowSaturationPort off
ShowStatePort off
IgnoreLimit off
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
Block {
BlockType ElementaryMath
Operator "sin"
}
Block {
BlockType EnablePort
StatesWhenEnabling "held"
ShowOutputPort off
ZeroCross on
}
Block {
BlockType From
IconDisplay "Tag"
}
Block {
BlockType Fcn
Expr "sin(u[1])"
SampleTime "-1"
}
Block {
BlockType Gain
Gain "1"
Multiplication "Element-wise(K.*u)"
ParameterDataTypeMode "Same as input"
ParameterDataType "sfix(16)"
ParameterScalingMode "Best Precision: Matrix-wise"
ParameterScaling "2^0"
OutDataTypeMode "Same as input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Goto
IconDisplay "Tag"
}
Block {
BlockType Ground
}
Block {
BlockType SignalConversion
OverrideOpt off
}
Block {
BlockType Inport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
Interpolate on
}
Block {
BlockType Logic
Operator "AND"
Inputs "2"
IconShape "rectangular"
AllPortsSameDT on
OutDataTypeMode "Logical (see Configuration Parameters: Optimiza"
"tion)"
LogicDataType "uint(8)"
SampleTime "-1"
}
Block {
BlockType Lookup
}
Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
}
Block {
BlockType Outport
Port "1"
UseBusObject off
BusObject "BusObject"
BusOutputAsStruct off
PortDimensions "-1"
SampleTime "-1"
DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
OutputWhenDisabled "held"
InitialOutput "[]"
}
Block {
BlockType PMComponent
SubClassName "unknown"
}
Block {
BlockType PMIOPort
}
Block {
BlockType Product
Inputs "2"
Multiplication "Element-wise(.*)"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Zero"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType RelationalOperator
Operator ">="
InputSameDT on
LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimiza"
"tion)"
LogicDataType "uint(8)"
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Saturate
UpperLimit "0.5"
LowerLimit "-0.5"
LinearizeAsGain on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Scope
ModelBased off
TickLabels "OneTimeTick"
ZoomMode "on"
Grid "on"
TimeRange "auto"
YMin "-5"
YMax "5"
SaveToWorkspace off
SaveName "ScopeData"
LimitDataPoints on
MaxDataPoints "5000"
Decimation "1"
SampleInput off
SampleTime "-1"
}
Block {
BlockType Selector
IndexMode "One-based"
InputPortWidth "-1"
OutputPortSize "1"
}
Block {
BlockType "S-Function"
FunctionName "system"
SFunctionModules "''"
PortCounts "[]"
}
Block {
BlockType Sin
SineType "Time based"
TimeSource "Use simulation time"
Amplitude "1"
Bias "0"
Frequency "1"
Phase "0"
Samples "10"
Offset "0"
SampleTime "-1"
VectorParams1D on
}
Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
}
Block {
BlockType Sum
IconShape "rectangular"
Inputs "++"
InputSameDT on
OutDataTypeMode "Same as first input"
OutDataType "sfix(16)"
OutScaling "2^0"
LockScale off
RndMeth "Floor"
SaturateOnIntegerOverflow on
SampleTime "-1"
}
Block {
BlockType Switch
Criteria "u2 >= Threshold"
Threshold "0"
InputSameDT on
OutDataTypeMode "Inherit via internal rule"
RndMeth "Floor"
SaturateOnIntegerOverflow on
ZeroCross on
SampleTime "-1"
}
Block {
BlockType Terminator
}
Block {
BlockType Trigonometry
Operator "sin"
OutputSignalType "auto"
SampleTime "-1"
}
Block {
BlockType UnitDelay
X0 "0"
SampleTime "1"
StateMustResolveToSignalObject off
RTWStateStorageClass "Auto"
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Arial"
FontSize 10
FontWeight "normal"
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