f206_addr.h

完成两路带有三差信号的拟合输出

/*********************************************************************
* Filename: f206_Addr.h                                                *
*                                                                    *
* Author: Archan Tianjin University.                     *
*                                                                    *
* Last Modified: 03/14/01                                            *
*                                                                    *
* Description: F206 DSP register definitions for C-code.           *
* The details:"TMS320F206 DIGITAL SIGNAL PROCESSOR" From page 19 to page 20 *
*********************************************************************/
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/* system registers*/
/* Core registers Data space */
#define IMR          (volatile unsigned int *)0x0004   /* Interrupt mask reg 0000H*/
/*initial value:0x0000.This 7-bit register individually masks or enables the seven
interupts.Bit 0 shares external interrupt INT1# and HOLD#.INT2# and INT3# share bit 1.
Bit 2 ties to the timer interrupt,TINT.Bits 3 and 4,TINT# and XINT#,respecitvely ,are for
the synchronous serial port,ASP.Bit 6 is reserved for monitor mode emulation operation
and must always be set to 0 except in conjunction with emulation monitor opertions.
Bits 7-15 are not used in the TMS320G206*/
#define GREG         (volatile unsigned int *)0x0005  /* Global memory allocation reg 0000H */
/*initial value:0x0000.Global memory allocation register.This 8-bitspecifies the size of 
the global memory space.GREG is set to  at reset*/
#define IFR          (volatile unsigned int *)0x0006   /* Interrupt flag reg 0000H*/
/*initial value:0x0000.interrupt flag register.
The 7-bit IFR indicates that the TMS320F206 has latched an interrupt INT1# and HOLD#.
INT2# and INT3# share bit1.
Bit 2 ties to the timer interrupt,TINT#.
Bits 3 and 4 ,TINT# and XINT#,respectively,are for the synchronous serial
port,SSP.
Bit 5,TXRXINT# shares the transmit and receive interrupts for the asynchronous serial 
port,ASP.
Bit 6 is reserved for monitor-mode emulation operations and must always be set 0
except in conjunction with emulation with emulation monitor operations.Writing a 1
the respective interrupt bit clears and active flag and the respective pending intrrupt.
Writing a 1 to an inactive flag has no effect.
Bit 7-15 are not used in the TMS320F206.*/
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/* I/O space*/
#define F_ACCESS0	portFFE0
ioport	unsigned	portFFE0;
/*initial value:0x0001.FLASH 0 access-control register.
Bit 0 selects one of two possible access modes for FLASH 0.
All other bits are reserved.
If bit cleared to 0,register-access mode is selected.
If bit 0 is set to a 1,array-access mode is selected.In array-access
mode,FLASH 0 memory array is mapped to the address range of FLASH 0.*/
#define	F_ACCESS1	portFFE1
ioport	unsigned	portFFE1;
/*initial value:0x0001.FLASH 1 access-control register.
Bit 0 selects one of two possible access modes for FLASH 1.
All other bits are reserved.
If bit cleared to 0,register-access mode is selected.
If bit 0 is set to a 1,array-access mode is selected.In array-access
mode,FLASH 1 memory array is mapped to the address range of FLASH 1.*/
#define	PMST		portFFE4
ioport	unsigned	portFFE4;
/*initial value:0x0006.Bit 0 latches in the MP/MC# pin at reset.This bit
can be written toconfigure Microprocessor(1) of Microcontroller mode(0).
Bit 1 and 2 configure the SARAM mapping either in program memory,data
memory,or both.At reset,these bit are 11,the SARAM is mapped in both program
and data space
DON(bit 2)		PON(bit 1)
0				0			-SARAM not mapped,address in external memory.
0				1			-SARAM in on-chip program memory at 0x8000h
1				0			-SARAM in on-chip data memory at 0x800h
1				1			-SARAM in on-chip program and data memory(reset value)
***********************************************************************/
#define	CLK			portFFE8
ioport	unsigned	portFFE8;
/* value at reset:0x0000.CLKOUT1 on or off.
At reset,bit 0 is configured as a zero for the CLKOUT1 pin to be active.
If bit 0 is a 1,CLKOUT1 pin is turned off.*/
/*******************************************************************/
#define	ICR			portFFEC
ioport	unsigned	portFFEC;
/*value at reset:0x0000.
Interrupt control register.
This register is used to determine which interrupt is active since 
INT1# and HOLD# share and interrupt vector as do INT2# and INT3#.A portion
of this register is for mssk/unmask(similar to IFR).
At reset,all bits are zeroed,therrby allowing the HOLD mode to be enabled.
The MODE bit is used by the hold-generating cirvcuit to determint if
a HOLD# or INT# is active./*
/**********************************************************************
**********************************************************************/
#define	SDTR		portFFF0
ioport	unsigned	portFFF0;
/*value at reset:0xxxxx.
Synchronous serial port(SSP)transmit and receive register*/ 
/**********************************************************************
**********************************************************************/
#define	SSPCR		portFFF1
ioport	unsigned	portFFF1;
/* value at reset:0x0030.
Synchronous serial-poot control register.
This register control controls serial-port operation as defined by the 
register bits*/
/**********************************************************************
**********************************************************************/
#define	SSPST		portFFF2
ioport	unsigned	portFFF2;
/* Synchronous serial-poot status register*/
#define	SSPMC		portFFF3
ioport	unsigned	portFFF3;
/*value at reset:0x0000.Synchronous serial-port multichannel register*/
#define	ADTR		portFFF4
ioport	unsigned	portFFF4;
/*value at reset:0xxxxx;
Asynchronous serial port(ASP)transmit and receive register*/
#define	ASPCR		portFFF5
ioport	unsigned	portFFF5;                               
/*value at reset:0x0000;
Asynchronous serial port(ASP) transmit and receive(ASPCR).
This register controls the asynchronous serial-port operation*/
#define	IOSR		portFFF6
ioport	unsigned	portFFF6;                                  
/*value at reset:0x18xx;
I/O status register.
IOSR is used for detecting current levels(and changes when inputs)
on pins IO0-IO3 and status of UART*/
#define	BRD			portFFF7
ioport	unsigned	portFFF7;       
/*value at reset:0x0001;
Baud-rate divisor register(baud-rate generator).
16-bit register used to determine buad rate of UART.
No data is transmitted/received if BRD is zero.*/
#define	TCR			portFFF8
ioport	unsigned	portFFF8;                    
/*value at reset:0x0000;
Timer-control register.
This 10-bit register contains the control bits that define the
divide-down ratio,start/stop the timer,and reload the period.
Also contained in this register is the current in the prescaler.
Reset initializes the timer divide-down tatio to 0 and starts the timer*/
#define	PRD			portFFF9
ioport	unsigned	portFFF9;
/*value at reset:0xffff;
Timer-period register.
This 16-bit register contains the 16-bit period that is loaded into the
timer counter when the counter borrows or when the reload bit is activated.
Reset initializes the PRD to 0xffff*/
#define	TIM			portFFFA
ioport	unsigned	portFFFA;        
/*value at reset:0xffff;
Timer-counter register.
This 16-bit register contains the current 16-bit count of the timer.*/
#define	SSPCT		portFFFB
ioport	unsigned	portFFFB;
/*value at reset:0x0000;
Synchronous serial-port counter register*/
#define	WSGR		portFFFC
ioport	unsigned	portFFFC;
/*value at reset:0x0fff;
Wait-state generator.
This register contains 12 control bits to enable 0 to 7 wait
states to program,data,and I/O space.*/
/*********************************************************************
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/*In the I/O space,the users can do with I/O port,include common I/O
port and register at I/O space,using OUT and IN in assembly language,
ioport in C language*/
/*User's defined IO port*/
/*******************************************************************/
/*****************old version I/O port*************************/
/*
#define ADPORT  port0000
ioport unsigned port0000;/* The reading port from AD1674 connected with CCD*/
/*
#define LEDPORT port0001
ioport unsigned port0001;/* The LED and LCD out port                      */
/*****************new version I/O port***************************/

#define ADPORT  port0000
ioport unsigned port0000;/* The reading port from AD1674 connected with CCD*/

#define LEDPORT port0001
ioport unsigned port0001;/* The LED and LCD out port */

#define KEYPORT port0002
ioport unsigned port0002;/*the enable keyboard port*/

#define LAMPORT port0003
ioport unsigned port0003;/*the enable keyboard port*/