singt.tan.qmsg

正弦波发生器

{ "Info" "ITDB_TSU_RESULT" "sld_hub:sld_hub_inst\|sld_dffex:IRF_ENA\|Q\[0\] altera_internal_jtag~TMSUTAP altera_internal_jtag~TCKUTAP 0.645 ns register " "Info: tsu for register sld_hub:sld_hub_inst\|sld_dffex:IRF_ENA\|Q\[0\] (data pin = altera_internal_jtag~TMSUTAP, clock pin = altera_internal_jtag~TCKUTAP) is 0.645 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.618 ns + Longest pin register " "Info: + Longest pin to register delay is 5.618 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TMSUTAP 1 PIN JTAG_X1_Y13_N1 23 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y13_N1; Fanout = 23; PIN Node = 'altera_internal_jtag~TMSUTAP'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { altera_internal_jtag~TMSUTAP } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.567 ns) + CELL(0.590 ns) 3.157 ns sld_hub:sld_hub_inst\|IRF_ENA_ENABLE~21 2 COMB LC_X23_Y11_N4 3 " "Info: 2: + IC(2.567 ns) + CELL(0.590 ns) = 3.157 ns; Loc. = LC_X23_Y11_N4; Fanout = 3; COMB Node = 'sld_hub:sld_hub_inst\|IRF_ENA_ENABLE~21'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.157 ns" { altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 371 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.594 ns) + CELL(0.867 ns) 5.618 ns sld_hub:sld_hub_inst\|sld_dffex:IRF_ENA\|Q\[0\] 3 REG LC_X25_Y10_N4 4 " "Info: 3: + IC(1.594 ns) + CELL(0.867 ns) = 5.618 ns; Loc. = LC_X25_Y10_N4; Fanout = 4; REG Node = 'sld_hub:sld_hub_inst\|sld_dffex:IRF_ENA\|Q\[0\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "2.461 ns" { sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21 sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.457 ns 25.93 % " "Info: Total cell delay = 1.457 ns ( 25.93 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.161 ns 74.07 % " "Info: Total interconnect delay = 4.161 ns ( 74.07 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.618 ns" { altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21 sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 5.010 ns - Shortest register " "Info: - Shortest clock path from clock altera_internal_jtag~TCKUTAP to destination register is 5.010 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y13_N1 254 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y13_N1; Fanout = 254; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.299 ns) + CELL(0.711 ns) 5.010 ns sld_hub:sld_hub_inst\|sld_dffex:IRF_ENA\|Q\[0\] 2 REG LC_X25_Y10_N4 4 " "Info: 2: + IC(4.299 ns) + CELL(0.711 ns) = 5.010 ns; Loc. = LC_X25_Y10_N4; Fanout = 4; REG Node = 'sld_hub:sld_hub_inst\|sld_dffex:IRF_ENA\|Q\[0\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.010 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.711 ns 14.19 % " "Info: Total cell delay = 0.711 ns ( 14.19 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.299 ns 85.81 % " "Info: Total interconnect delay = 4.299 ns ( 85.81 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.010 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] } "NODE_NAME" } } }  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.618 ns" { altera_internal_jtag~TMSUTAP sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21 sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.010 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK DOUT\[6\] data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|ram_block3a7~porta_address_reg0 15.313 ns memory " "Info: tco from clock CLK to destination pin DOUT\[6\] through memory data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|ram_block3a7~porta_address_reg0 is 15.313 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 3.158 ns + Longest memory " "Info: + Longest clock path from clock CLK to source memory is 3.158 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_28 149 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 149; CLK Node = 'CLK'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/singt.vhd" "" "" { Text "E:/highflu documents/quartwork/singt/singt.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.967 ns) + CELL(0.722 ns) 3.158 ns data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|ram_block3a7~porta_address_reg0 2 MEM M4K_X19_Y11 8 " "Info: 2: + IC(0.967 ns) + CELL(0.722 ns) = 3.158 ns; Loc. = M4K_X19_Y11; Fanout = 8; MEM Node = 'data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|ram_block3a7~porta_address_reg0'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.689 ns" { CLK data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|ram_block3a7~porta_address_reg0 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" 267 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 69.38 % " "Info: Total cell delay = 2.191 ns ( 69.38 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.967 ns 30.62 % " "Info: Total interconnect delay = 0.967 ns ( 30.62 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.158 ns" { CLK data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|ram_block3a7~porta_address_reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.650 ns + " "Info: + Micro clock to output delay of source is 0.650 ns" {  } { { "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" 267 2 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.505 ns + Longest memory pin " "Info: + Longest memory to pin delay is 11.505 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|ram_block3a7~porta_address_reg0 1 MEM M4K_X19_Y11 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X19_Y11; Fanout = 8; MEM Node = 'data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|ram_block3a7~porta_address_reg0'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|ram_block3a7~porta_address_reg0 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" 267 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.308 ns) 4.308 ns data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|q_a\[6\] 2 MEM M4K_X19_Y11 2 " "Info: 2: + IC(0.000 ns) + CELL(4.308 ns) = 4.308 ns; Loc. = M4K_X19_Y11; Fanout = 2; MEM Node = 'data_rom:u1\|altsyncram:altsyncram_component\|altsyncram_hat:auto_generated\|altsyncram_71b2:altsyncram1\|q_a\[6\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "4.308 ns" { data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|ram_block3a7~porta_address_reg0 data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|q_a[6] } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/altsyncram_71b2.tdf" 38 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.073 ns) + CELL(2.124 ns) 11.505 ns DOUT\[6\] 3 PIN PIN_135 0 " "Info: 3: + IC(5.073 ns) + CELL(2.124 ns) = 11.505 ns; Loc. = PIN_135; Fanout = 0; PIN Node = 'DOUT\[6\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "7.197 ns" { data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|q_a[6] DOUT[6] } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/singt.vhd" "" "" { Text "E:/highflu documents/quartwork/singt/singt.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.432 ns 55.91 % " "Info: Total cell delay = 6.432 ns ( 55.91 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.073 ns 44.09 % " "Info: Total interconnect delay = 5.073 ns ( 44.09 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "11.505 ns" { data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|ram_block3a7~porta_address_reg0 data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|q_a[6] DOUT[6] } "NODE_NAME" } } }  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.158 ns" { CLK data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|ram_block3a7~porta_address_reg0 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "11.505 ns" { data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|ram_block3a7~porta_address_reg0 data_rom:u1|altsyncram:altsyncram_component|altsyncram_hat:auto_generated|altsyncram_71b2:altsyncram1|q_a[6] DOUT[6] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "altera_internal_jtag~TDO altera_reserved_tdo 2.124 ns Longest " "Info: Longest tpd from source pin altera_internal_jtag~TDO to destination pin altera_reserved_tdo is 2.124 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TDO 1 PIN JTAG_X1_Y13_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y13_N1; Fanout = 1; PIN Node = 'altera_internal_jtag~TDO'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.124 ns) 2.124 ns altera_reserved_tdo 2 PIN PIN_149 0 " "Info: 2: + IC(0.000 ns) + CELL(2.124 ns) = 2.124 ns; Loc. = PIN_149; Fanout = 0; PIN Node = 'altera_reserved_tdo'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "2.124 ns" { altera_internal_jtag~TDO altera_reserved_tdo } "NODE_NAME" } } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.124 ns 100.00 % " "Info: Total cell delay = 2.124 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "2.124 ns" { altera_internal_jtag~TDO altera_reserved_tdo } "NODE_NAME" } } }  } 0}