singt.tan.qmsg

正弦波发生器

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLK " "Info: Assuming node CLK is an undefined clock" {  } { { "E:/highflu documents/quartwork/singt/singt.vhd" "" "" { Text "E:/highflu documents/quartwork/singt/singt.vhd" 5 -1 0 } } { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "CLK" } } } }  } 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "altera_internal_jtag~TCKUTAP " "Info: Assuming node altera_internal_jtag~TCKUTAP is an undefined clock" {  } { { "c:/altera/quartus41/bin/Assignment Editor.qase" "" "" { Assignment "c:/altera/quartus41/bin/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TCKUTAP" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\] memory sld_signaltap:sinout\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_6g82:auto_generated\|ram_block1a0~porta_we_reg 143.06 MHz 6.99 ns Internal " "Info: Clock CLK has Internal fmax of 143.06 MHz between source register sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\] and destination memory sld_signaltap:sinout\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_6g82:auto_generated\|ram_block1a0~porta_we_reg (period= 6.99 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.684 ns + Longest register memory " "Info: + Longest register to memory delay is 6.684 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\] 1 REG LC_X22_Y15_N6 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X22_Y15_N6; Fanout = 7; REG Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 132 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.523 ns) + CELL(0.575 ns) 1.098 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\]~COUT1 2 COMB LC_X22_Y15_N6 2 " "Info: 2: + IC(0.523 ns) + CELL(0.575 ns) = 1.098 ns; Loc. = LC_X22_Y15_N6; Fanout = 2; COMB Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\]~COUT1'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.098 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1]~COUT1 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 132 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.178 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[2\]~COUT1 3 COMB LC_X22_Y15_N7 2 " "Info: 3: + IC(0.000 ns) + CELL(0.080 ns) = 1.178 ns; Loc. = LC_X22_Y15_N7; Fanout = 2; COMB Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[2\]~COUT1'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "0.080 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[2]~COUT1 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 132 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 1.258 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[3\]~COUT1 4 COMB LC_X22_Y15_N8 2 " "Info: 4: + IC(0.000 ns) + CELL(0.080 ns) = 1.258 ns; Loc. = LC_X22_Y15_N8; Fanout = 2; COMB Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[3\]~COUT1'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "0.080 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[2]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[3]~COUT1 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 132 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.258 ns) 1.516 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|counter_cella4~COUT 5 COMB LC_X22_Y15_N9 6 " "Info: 5: + IC(0.000 ns) + CELL(0.258 ns) = 1.516 ns; Loc. = LC_X22_Y15_N9; Fanout = 6; COMB Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|counter_cella4~COUT'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "0.258 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[3]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella4~COUT } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 71 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.136 ns) 1.652 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|counter_cella9~COUT 6 COMB LC_X22_Y14_N4 1 " "Info: 6: + IC(0.000 ns) + CELL(0.136 ns) = 1.652 ns; Loc. = LC_X22_Y14_N4; Fanout = 1; COMB Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|counter_cella9~COUT'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "0.136 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella4~COUT sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella9~COUT } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 111 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.621 ns) 2.273 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|cout 7 COMB LC_X22_Y14_N5 4 " "Info: 7: + IC(0.000 ns) + CELL(0.621 ns) = 2.273 ns; Loc. = LC_X22_Y14_N5; Fanout = 4; COMB Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|cout'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "0.621 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella9~COUT sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|cout } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 164 2 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.240 ns) + CELL(0.114 ns) 3.627 ns sld_signaltap:sinout\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|buffer_write_enable~23 8 COMB LC_X21_Y12_N6 2 " "Info: 8: + IC(1.240 ns) + CELL(0.114 ns) = 3.627 ns; Loc. = LC_X21_Y12_N6; Fanout = 2; COMB Node = 'sld_signaltap:sinout\|sld_ela_control:ela_control\|sld_ela_segment_mgr:\\gen_non_zero_sample_depth_segment:seg_mgr\|buffer_write_enable~23'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.354 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|cout sld_signaltap:sinout|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|buffer_write_enable~23 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_ela_control.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_ela_control.vhd" 1337 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.681 ns) + CELL(0.114 ns) 4.422 ns sld_signaltap:sinout\|sld_ela_control:ela_control\|buffer_write_ena_int~40 9 COMB LC_X22_Y12_N8 2 " "Info: 9: + IC(0.681 ns) + CELL(0.114 ns) = 4.422 ns; Loc. = LC_X22_Y12_N8; Fanout = 2; COMB Node = 'sld_signaltap:sinout\|sld_ela_control:ela_control\|buffer_write_ena_int~40'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "0.795 ns" { sld_signaltap:sinout|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|buffer_write_enable~23 sld_signaltap:sinout|sld_ela_control:ela_control|buffer_write_ena_int~40 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_ela_control.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_ela_control.vhd" 428 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.835 ns) + CELL(0.427 ns) 6.684 ns sld_signaltap:sinout\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_6g82:auto_generated\|ram_block1a0~porta_we_reg 10 MEM M4K_X19_Y13 0 " "Info: 10: + IC(1.835 ns) + CELL(0.427 ns) = 6.684 ns; Loc. = M4K_X19_Y13; Fanout = 0; MEM Node = 'sld_signaltap:sinout\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_6g82:auto_generated\|ram_block1a0~porta_we_reg'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "2.262 ns" { sld_signaltap:sinout|sld_ela_control:ela_control|buffer_write_ena_int~40 sld_signaltap:sinout|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_6g82:auto_generated|ram_block1a0~porta_we_reg } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/altsyncram_6g82.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/altsyncram_6g82.tdf" 42 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.405 ns 35.98 % " "Info: Total cell delay = 2.405 ns ( 35.98 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.279 ns 64.02 % " "Info: Total interconnect delay = 4.279 ns ( 64.02 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "6.684 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[2]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[3]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella4~COUT sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella9~COUT sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|cout sld_signaltap:sinout|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|buffer_write_enable~23 sld_signaltap:sinout|sld_ela_control:ela_control|buffer_write_ena_int~40 sld_signaltap:sinout|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_6g82:auto_generated|ram_block1a0~porta_we_reg } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.011 ns - Smallest " "Info: - Smallest clock skew is 0.011 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 3.197 ns + Shortest memory " "Info: + Shortest clock path from clock CLK to destination memory is 3.197 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_28 149 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 149; CLK Node = 'CLK'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/singt.vhd" "" "" { Text "E:/highflu documents/quartwork/singt/singt.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.006 ns) + CELL(0.722 ns) 3.197 ns sld_signaltap:sinout\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_6g82:auto_generated\|ram_block1a0~porta_we_reg 2 MEM M4K_X19_Y13 0 " "Info: 2: + IC(1.006 ns) + CELL(0.722 ns) = 3.197 ns; Loc. = M4K_X19_Y13; Fanout = 0; MEM Node = 'sld_signaltap:sinout\|altsyncram:\\stp_non_zero_ram_gen:stp_buffer_ram\|altsyncram_6g82:auto_generated\|ram_block1a0~porta_we_reg'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.728 ns" { CLK sld_signaltap:sinout|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_6g82:auto_generated|ram_block1a0~porta_we_reg } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/altsyncram_6g82.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/altsyncram_6g82.tdf" 42 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 68.53 % " "Info: Total cell delay = 2.191 ns ( 68.53 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.006 ns 31.47 % " "Info: Total interconnect delay = 1.006 ns ( 31.47 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.197 ns" { CLK sld_signaltap:sinout|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_6g82:auto_generated|ram_block1a0~porta_we_reg } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 3.186 ns - Longest register " "Info: - Longest clock path from clock CLK to source register is 3.186 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK 1 CLK PIN_28 149 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 149; CLK Node = 'CLK'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { CLK } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/singt.vhd" "" "" { Text "E:/highflu documents/quartwork/singt/singt.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.006 ns) + CELL(0.711 ns) 3.186 ns sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\] 2 REG LC_X22_Y15_N6 7 " "Info: 2: + IC(1.006 ns) + CELL(0.711 ns) = 3.186 ns; Loc. = LC_X22_Y15_N6; Fanout = 7; REG Node = 'sld_signaltap:sinout\|sld_acquisition_buffer:sld_acquisition_buffer_inst\|lpm_counter:\\write_address_non_zero_gen:write_pointer_counter\|cntr_nt9:auto_generated\|safe_q\[1\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.717 ns" { CLK sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 132 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 68.42 % " "Info: Total cell delay = 2.180 ns ( 68.42 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.006 ns 31.58 % " "Info: Total interconnect delay = 1.006 ns ( 31.58 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.186 ns" { CLK sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] } "NODE_NAME" } } }  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.197 ns" { CLK sld_signaltap:sinout|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_6g82:auto_generated|ram_block1a0~porta_we_reg } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.186 ns" { CLK sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/cntr_nt9.tdf" 132 8 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "E:/highflu documents/quartwork/singt/db/altsyncram_6g82.tdf" "" "" { Text "E:/highflu documents/quartwork/singt/db/altsyncram_6g82.tdf" 42 2 0 } }  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "6.684 ns" { sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[2]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[3]~COUT1 sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella4~COUT sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|counter_cella9~COUT sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|cout sld_signaltap:sinout|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|buffer_write_enable~23 sld_signaltap:sinout|sld_ela_control:ela_control|buffer_write_ena_int~40 sld_signaltap:sinout|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_6g82:auto_generated|ram_block1a0~porta_we_reg } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.197 ns" { CLK sld_signaltap:sinout|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_6g82:auto_generated|ram_block1a0~porta_we_reg } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "3.186 ns" { CLK sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|lpm_counter:\write_address_non_zero_gen:write_pointer_counter|cntr_nt9:auto_generated|safe_q[1] } "NODE_NAME" } } }  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "altera_internal_jtag~TCKUTAP register sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] register sld_hub:sld_hub_inst\|HUB_TDO~reg0 113.61 MHz 8.802 ns Internal " "Info: Clock altera_internal_jtag~TCKUTAP has Internal fmax of 113.61 MHz between source register sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] and destination register sld_hub:sld_hub_inst\|HUB_TDO~reg0 (period= 8.802 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.142 ns + Longest register register " "Info: + Longest register to register delay is 4.142 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] 1 REG LC_X25_Y11_N1 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X25_Y11_N1; Fanout = 4; REG Node = 'sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.752 ns) + CELL(0.590 ns) 1.342 ns sld_hub:sld_hub_inst\|HUB_TDO~522 2 COMB LC_X24_Y11_N1 1 " "Info: 2: + IC(0.752 ns) + CELL(0.590 ns) = 1.342 ns; Loc. = LC_X24_Y11_N1; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~522'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.342 ns" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] sld_hub:sld_hub_inst|HUB_TDO~522 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.228 ns) + CELL(0.114 ns) 2.684 ns sld_hub:sld_hub_inst\|HUB_TDO~498 3 COMB LC_X25_Y12_N4 1 " "Info: 3: + IC(1.228 ns) + CELL(0.114 ns) = 2.684 ns; Loc. = LC_X25_Y12_N4; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~498'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.342 ns" { sld_hub:sld_hub_inst|HUB_TDO~522 sld_hub:sld_hub_inst|HUB_TDO~498 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.340 ns) + CELL(0.114 ns) 3.138 ns sld_hub:sld_hub_inst\|HUB_TDO~529 4 COMB LC_X25_Y12_N5 1 " "Info: 4: + IC(0.340 ns) + CELL(0.114 ns) = 3.138 ns; Loc. = LC_X25_Y12_N5; Fanout = 1; COMB Node = 'sld_hub:sld_hub_inst\|HUB_TDO~529'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "0.454 ns" { sld_hub:sld_hub_inst|HUB_TDO~498 sld_hub:sld_hub_inst|HUB_TDO~529 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 134 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.397 ns) + CELL(0.607 ns) 4.142 ns sld_hub:sld_hub_inst\|HUB_TDO~reg0 5 REG LC_X25_Y12_N6 0 " "Info: 5: + IC(0.397 ns) + CELL(0.607 ns) = 4.142 ns; Loc. = LC_X25_Y12_N6; Fanout = 0; REG Node = 'sld_hub:sld_hub_inst\|HUB_TDO~reg0'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "1.004 ns" { sld_hub:sld_hub_inst|HUB_TDO~529 sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 937 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.425 ns 34.40 % " "Info: Total cell delay = 1.425 ns ( 34.40 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.717 ns 65.60 % " "Info: Total interconnect delay = 2.717 ns ( 65.60 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "4.142 ns" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] sld_hub:sld_hub_inst|HUB_TDO~522 sld_hub:sld_hub_inst|HUB_TDO~498 sld_hub:sld_hub_inst|HUB_TDO~529 sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.002 ns - Smallest " "Info: - Smallest clock skew is 0.002 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 5.012 ns + Shortest register " "Info: + Shortest clock path from clock altera_internal_jtag~TCKUTAP to destination register is 5.012 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y13_N1 254 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y13_N1; Fanout = 254; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.301 ns) + CELL(0.711 ns) 5.012 ns sld_hub:sld_hub_inst\|HUB_TDO~reg0 2 REG LC_X25_Y12_N6 0 " "Info: 2: + IC(4.301 ns) + CELL(0.711 ns) = 5.012 ns; Loc. = LC_X25_Y12_N6; Fanout = 0; REG Node = 'sld_hub:sld_hub_inst\|HUB_TDO~reg0'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.012 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 937 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.711 ns 14.19 % " "Info: Total cell delay = 0.711 ns ( 14.19 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.301 ns 85.81 % " "Info: Total interconnect delay = 4.301 ns ( 85.81 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.012 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP source 5.010 ns - Longest register " "Info: - Longest clock path from clock altera_internal_jtag~TCKUTAP to source register is 5.010 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TCKUTAP 1 CLK JTAG_X1_Y13_N1 254 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y13_N1; Fanout = 254; CLK Node = 'altera_internal_jtag~TCKUTAP'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "" { altera_internal_jtag~TCKUTAP } "NODE_NAME" } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.299 ns) + CELL(0.711 ns) 5.010 ns sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\] 2 REG LC_X25_Y11_N1 4 " "Info: 2: + IC(4.299 ns) + CELL(0.711 ns) = 5.010 ns; Loc. = LC_X25_Y11_N1; Fanout = 4; REG Node = 'sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[1\]'" {  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.010 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } } } { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.711 ns 14.19 % " "Info: Total cell delay = 0.711 ns ( 14.19 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.299 ns 85.81 % " "Info: Total interconnect delay = 4.299 ns ( 85.81 % )" {  } {  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.010 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } } }  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.012 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.010 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 937 -1 0 } }  } 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" {  } { { "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_dffex.vhd" 8 -1 0 } } { "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" "" "" { Text "c:/altera/quartus41/libraries/megafunctions/sld_hub.vhd" 937 -1 0 } }  } 0}  } { { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "4.142 ns" { sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] sld_hub:sld_hub_inst|HUB_TDO~522 sld_hub:sld_hub_inst|HUB_TDO~498 sld_hub:sld_hub_inst|HUB_TDO~529 sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.012 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|HUB_TDO~reg0 } "NODE_NAME" } } } { "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" "" "" { Report "E:/highflu documents/quartwork/singt/db/singt_cmp.qrpt" Compiler "singt" "UNKNOWN" "V1" "E:/highflu documents/quartwork/singt/db/singt.quartus_db" { Floorplan "" "" "5.010 ns" { altera_internal_jtag~TCKUTAP sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] } "NODE_NAME" } } }  } 0}