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}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_ela_control.vhd
1088009286
4
# storage
db|singt.(25).cnf
db|singt.(25).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_level
1
PARAMETER_DEC
USR
data_bits
8
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
sync_enabled
1
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|lpm_shiftreg.tdf
1088009432
6
# storage
db|singt.(26).cnf
db|singt.(26).cnf
# user_parameter {
LPM_WIDTH
24
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
data0
data10
data11
data12
data13
data14
data15
data16
data17
data18
data19
data1
data20
data21
data22
data23
data2
data3
data4
data5
data6
data7
data8
data9
enable
load
q0
q10
q11
q12
q13
q14
q15
q16
q17
q18
q19
q1
q20
q21
q22
q23
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
shiftout
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|lpm_constant.inc
1081478554
c:|altera|quartus41|libraries|megafunctions|dffeea.inc
1081478268
c:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
sld_mbpmg
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_mbpmg.vhd
1088009286
4
# storage
db|singt.(27).cnf
db|singt.(27).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
data_bits
8
PARAMETER_DEC
USR
pattern_bits
3
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
sync_enabled
1
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
sld_sbpmg
# architecture
A:rtl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_mbpmg.vhd
1088009286
4
# storage
db|singt.(28).cnf
db|singt.(28).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
async_enabled
0
PARAMETER_DEC
USR
pipeline
1
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
sld_ela_level_seq_mgr
# architecture
A:rtl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_ela_control.vhd
1088009286
4
# storage
db|singt.(29).cnf
db|singt.(29).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
trigger_level
2
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
trigger_in_enabled
0
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
sld_ela_state_machine
# architecture
A:rtl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_ela_control.vhd
1088009286
4
# storage
db|singt.(30).cnf
db|singt.(30).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
sld_ela_seg_state_machine
# architecture
A:rtl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_ela_control.vhd
1088009286
4
# storage
db|singt.(31).cnf
db|singt.(31).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
ela_status_bits
3
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
sld_ela_post_trigger_counter
# architecture
A:rtl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_ela_control.vhd
1088009286
4
# storage
db|singt.(32).cnf
db|singt.(32).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
trigger_level_pipeline
1
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|lpm_counter.tdf
1088009428
6
# storage
db|singt.(33).cnf
db|singt.(33).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
DEFAULT
PARAMETER_UNKNOWN
DEF
LPM_MODULUS
0
PARAMETER_DEC
USR
LPM_AVALUE
2
PARAMETER_DEC
USR
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_mo8
PARAMETER_UNKNOWN
USR
}
# used_port {
aset
clk_en
clock
q7
q8
q9
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|lpm_constant.inc
1081478554
c:|altera|quartus41|libraries|megafunctions|lpm_decode.inc
1081478592
c:|altera|quartus41|libraries|megafunctions|lpm_add_sub.inc
1081478464
c:|altera|quartus41|libraries|megafunctions|cmpconst.inc
1081478088
c:|altera|quartus41|libraries|megafunctions|lpm_compare.inc
1081478538
c:|altera|quartus41|libraries|megafunctions|lpm_counter.inc
1081478574
c:|altera|quartus41|libraries|megafunctions|dffeea.inc
1081478268
c:|altera|quartus41|libraries|megafunctions|alt_synch_counter.inc
1081477038
c:|altera|quartus41|libraries|megafunctions|alt_synch_counter_f.inc
1081477054
c:|altera|quartus41|libraries|megafunctions|alt_counter_f10ke.inc
1081476700
c:|altera|quartus41|libraries|megafunctions|alt_counter_stratix.inc
1081476712
c:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
cntr_mo8
# case_insensitive
# source_file
db|cntr_mo8.tdf
1192624182
6
# storage
db|singt.(34).cnf
db|singt.(34).cnf
# used_port {
clock
clk_en
aset
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
}
# end
# entity
sld_ela_segment_mgr
# architecture
A:rtl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus41|libraries|megafunctions|sld_ela_control.vhd
1088009286
4
# storage
db|singt.(35).cnf
db|singt.(35).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
3
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
mem_address_bits
10
PARAMETER_DEC
USR
sample_depth
1024
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
c:|altera|quartus41|libraries|megafunctions|sld_signaltap.vhd
1088009288
}
# end
# entity
lpm_counter
# case_insensitive
12345

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