song.map.qmsg

用VHDL演示MUSIC的程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 181 06/29/2004 SJ Full Version " "Info: Version 4.1 Build 181 06/29/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Oct 24 15:05:01 2007 " "Info: Processing started: Wed Oct 24 15:05:01 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off song -c song " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off song -c song" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "song.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file song.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 song-behave_song " "Info: Found design unit 1: song-behave_song" {  } { { "E:/highflu documents/quartwork/song/song.vhd" "song-behave_song" "" { Text "E:/highflu documents/quartwork/song/song.vhd" 12 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 song " "Info: Found entity 1: song" {  } { { "E:/highflu documents/quartwork/song/song.vhd" "song" "" { Text "E:/highflu documents/quartwork/song/song.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "speakera.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file speakera.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 speakera-behave_speakera " "Info: Found design unit 1: speakera-behave_speakera" {  } { { "E:/highflu documents/quartwork/song/speakera.vhd" "speakera-behave_speakera" "" { Text "E:/highflu documents/quartwork/song/speakera.vhd" 11 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 speakera " "Info: Found entity 1: speakera" {  } { { "E:/highflu documents/quartwork/song/speakera.vhd" "speakera" "" { Text "E:/highflu documents/quartwork/song/speakera.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "tonetaba.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file tonetaba.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 tonetaba-behave_tonetaba " "Info: Found design unit 1: tonetaba-behave_tonetaba" {  } { { "E:/highflu documents/quartwork/song/tonetaba.vhd" "tonetaba-behave_tonetaba" "" { Text "E:/highflu documents/quartwork/song/tonetaba.vhd" 12 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 tonetaba " "Info: Found entity 1: tonetaba" {  } { { "E:/highflu documents/quartwork/song/tonetaba.vhd" "tonetaba" "" { Text "E:/highflu documents/quartwork/song/tonetaba.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "notetabs.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file notetabs.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 notetabs-behave_notetabs " "Info: Found design unit 1: notetabs-behave_notetabs" {  } { { "E:/highflu documents/quartwork/song/notetabs.vhd" "notetabs-behave_notetabs" "" { Text "E:/highflu documents/quartwork/song/notetabs.vhd" 10 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 notetabs " "Info: Found entity 1: notetabs" {  } { { "E:/highflu documents/quartwork/song/notetabs.vhd" "notetabs" "" { Text "E:/highflu documents/quartwork/song/notetabs.vhd" 5 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "music.vhd 2 1 " "Info: Using design file music.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 music-SYN " "Info: Found design unit 1: music-SYN" {  } { { "E:/highflu documents/quartwork/song/music.vhd" "music-SYN" "" { Text "E:/highflu documents/quartwork/song/music.vhd" 57 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 music " "Info: Found entity 1: music" {  } { { "E:/highflu documents/quartwork/song/music.vhd" "music" "" { Text "E:/highflu documents/quartwork/song/music.vhd" 45 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "c:/altera/quartus41/libraries/megafunctions/altsyncram.tdf" "altsyncram" "" { Text "c:/altera/quartus41/libraries/megafunctions/altsyncram.tdf" 431 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_v821.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_v821.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_v821 " "Info: Found entity 1: altsyncram_v821" {  } { { "E:/highflu documents/quartwork/song/db/altsyncram_v821.tdf" "altsyncram_v821" "" { Text "E:/highflu documents/quartwork/song/db/altsyncram_v821.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "tone tonetaba.vhd(14) " "Warning: VHDL Process Statement warning at tonetaba.vhd(14): signal or variable tone may not be assigned a new value in every possible path through the Process Statement. Signal or variable tone holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "E:/highflu documents/quartwork/song/tonetaba.vhd" "" "" { Text "E:/highflu documents/quartwork/song/tonetaba.vhd" 14 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "code tonetaba.vhd(14) " "Warning: VHDL Process Statement warning at tonetaba.vhd(14): signal or variable code may not be assigned a new value in every possible path through the Process Statement. Signal or variable code holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "E:/highflu documents/quartwork/song/tonetaba.vhd" "" "" { Text "E:/highflu documents/quartwork/song/tonetaba.vhd" 14 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "high tonetaba.vhd(14) " "Warning: VHDL Process Statement warning at tonetaba.vhd(14): signal or variable high may not be assigned a new value in every possible path through the Process Statement. Signal or variable high holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "E:/highflu documents/quartwork/song/tonetaba.vhd" "" "" { Text "E:/highflu documents/quartwork/song/tonetaba.vhd" 14 0 0 } }  } 0}
{ "Info" "IOPT_MLS_IGNORED_SUMMARY" "16 " "Info: Ignored 16 buffer(s)" { { "Info" "IOPT_MLS_IGNORED_SOFT" "16 " "Info: Ignored 16 SOFT buffer(s)" {  } {  } 0}  } {  } 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "speakera:u3\|spks speakera:u3\|\\delayspks:count2 " "Info: Duplicate register speakera:u3\|spks merged to single register speakera:u3\|\\delayspks:count2" {  } { { "E:/highflu documents/quartwork/song/speakera.vhd" "" "" { Text "E:/highflu documents/quartwork/song/speakera.vhd" 8 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "3 " "Info: Inferred 3 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "speakera:u3\|\\genspks:count11\[0\]~0 11 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=11) from the following logic: speakera:u3\|\\genspks:count11\[0\]~0" {  } {  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "speakera:u3\|\\divdeclk:count4\[0\]~0 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: speakera:u3\|\\divdeclk:count4\[0\]~0" {  } {  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "notetabs:u1\|counter\[0\]~0 8 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: notetabs:u1\|counter\[0\]~0" {  } { { "E:/highflu documents/quartwork/song/notetabs.vhd" "" "counter\[0\]~0" { Text "E:/highflu documents/quartwork/song/notetabs.vhd" 21 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf" "lpm_counter" "" { Text "c:/altera/quartus41/libraries/megafunctions/lpm_counter.tdf" 227 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_7t7.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_7t7.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_7t7 " "Info: Found entity 1: cntr_7t7" {  } { { "E:/highflu documents/quartwork/song/db/cntr_7t7.tdf" "cntr_7t7" "" { Text "E:/highflu documents/quartwork/song/db/cntr_7t7.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_ea7.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_ea7.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_ea7 " "Info: Found entity 1: cntr_ea7" {  } { { "E:/highflu documents/quartwork/song/db/cntr_ea7.tdf" "cntr_ea7" "" { Text "E:/highflu documents/quartwork/song/db/cntr_ea7.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_ia7.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_ia7.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_ia7 " "Info: Found entity 1: cntr_ia7" {  } { { "E:/highflu documents/quartwork/song/db/cntr_ia7.tdf" "cntr_ia7" "" { Text "E:/highflu documents/quartwork/song/db/cntr_ia7.tdf" 31 1 0 } }  } 0}  } {  } 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "code1\[3\] GND " "Warning: Pin code1\[3\] stuck at GND" {  } { { "E:/highflu documents/quartwork/song/song.vhd" "" "" { Text "E:/highflu documents/quartwork/song/song.vhd" 7 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "74 " "Info: Implemented 74 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "6 " "Info: Implemented 6 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "62 " "Info: Implemented 62 logic cells" {  } {  } 0} { "Info" "ISCL_SCL_TM_RAMS" "4 " "Info: Implemented 4 RAM segments" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 5 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Oct 24 15:05:06 2007 " "Info: Processing ended: Wed Oct 24 15:05:06 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0}  } {  } 0}