song.vhd

用VHDL演示MUSIC的程序

library ieee;
use ieee.std_logic_1164.all;

entity song is
  port ( clk12mhz : in std_logic;
         clk8hz   : in std_logic;
            code1 : out std_logic_vector ( 3 downto 0 );
            high1 : out std_logic;
           spkout : out std_logic );
end entity song;

architecture behave_song of song is
component notetabs 
   port ( clk : in std_logic;
    toneindex : out std_logic_vector ( 3 downto 0 ) );
end component;

component tonetaba
    port ( index : in std_logic_vector ( 3 downto 0 );
           code  : out std_logic_vector ( 3 downto 0 );
           high  : out std_logic;
           tone  : out std_logic_vector ( 10 downto 0 ) );
end component;

component speakera 
   port ( clk : in std_logic;
         tone : in std_logic_vector ( 10 downto 0 );
          spks : out std_logic );
end component;

signal tone : std_logic_vector ( 10 downto 0 );
signal toneindex : std_logic_vector ( 3 downto 0 );
begin
u1 : notetabs port map ( clk => clk8hz, toneindex => toneindex );
u2 : tonetaba port map ( index => toneindex, tone => tone, code => code1, high => high1 );
u3 : speakera port map ( clk => clk12mhz, tone => tone, spks => spkout );
end behave_song;