song.map.eqn

用VHDL演示MUSIC的程序

--D1_\delayspks:count2 is speakera:u3|\delayspks:count2
--operation mode is normal

D1_\delayspks:count2_lut_out = !D1_\delayspks:count2;
D1_\delayspks:count2 = DFFEA(D1_\delayspks:count2_lut_out, D1_fullspks, VCC, , , , );


--J1_q_a[0] is notetabs:u1|music:u4|altsyncram:altsyncram_component|altsyncram_v821:auto_generated|q_a[0]
--RAM Block Operation Mode: Single Port
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Registered
J1_q_a[0]_PORT_A_data_in = VCC;
J1_q_a[0]_PORT_A_data_in_reg = DFFE(J1_q_a[0]_PORT_A_data_in, J1_q_a[0]_clock_0, , , );
J1_q_a[0]_PORT_A_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[0]_PORT_A_address_reg = DFFE(J1_q_a[0]_PORT_A_address, J1_q_a[0]_clock_0, , , );
J1_q_a[0]_PORT_B_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[0]_PORT_B_address_reg = DFFE(J1_q_a[0]_PORT_B_address, J1_q_a[0]_clock_0, , , );
J1_q_a[0]_PORT_A_write_enable = GND;
J1_q_a[0]_PORT_A_write_enable_reg = DFFE(J1_q_a[0]_PORT_A_write_enable, J1_q_a[0]_clock_0, , , );
J1_q_a[0]_clock_0 = clk8hz;
J1_q_a[0]_PORT_A_data_out = MEMORY(J1_q_a[0]_PORT_A_data_in_reg, , J1_q_a[0]_PORT_A_address_reg, J1_q_a[0]_PORT_B_address_reg, J1_q_a[0]_PORT_A_write_enable_reg, , , , J1_q_a[0]_clock_0, , , , , );
J1_q_a[0]_PORT_A_data_out_reg = DFFE(J1_q_a[0]_PORT_A_data_out, J1_q_a[0]_clock_0, , , );
J1_q_a[0] = J1_q_a[0]_PORT_A_data_out_reg[0];


--J1_q_a[1] is notetabs:u1|music:u4|altsyncram:altsyncram_component|altsyncram_v821:auto_generated|q_a[1]
--RAM Block Operation Mode: Single Port
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Registered
J1_q_a[1]_PORT_A_data_in = VCC;
J1_q_a[1]_PORT_A_data_in_reg = DFFE(J1_q_a[1]_PORT_A_data_in, J1_q_a[1]_clock_0, , , );
J1_q_a[1]_PORT_A_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[1]_PORT_A_address_reg = DFFE(J1_q_a[1]_PORT_A_address, J1_q_a[1]_clock_0, , , );
J1_q_a[1]_PORT_B_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[1]_PORT_B_address_reg = DFFE(J1_q_a[1]_PORT_B_address, J1_q_a[1]_clock_0, , , );
J1_q_a[1]_PORT_A_write_enable = GND;
J1_q_a[1]_PORT_A_write_enable_reg = DFFE(J1_q_a[1]_PORT_A_write_enable, J1_q_a[1]_clock_0, , , );
J1_q_a[1]_clock_0 = clk8hz;
J1_q_a[1]_PORT_A_data_out = MEMORY(J1_q_a[1]_PORT_A_data_in_reg, , J1_q_a[1]_PORT_A_address_reg, J1_q_a[1]_PORT_B_address_reg, J1_q_a[1]_PORT_A_write_enable_reg, , , , J1_q_a[1]_clock_0, , , , , );
J1_q_a[1]_PORT_A_data_out_reg = DFFE(J1_q_a[1]_PORT_A_data_out, J1_q_a[1]_clock_0, , , );
J1_q_a[1] = J1_q_a[1]_PORT_A_data_out_reg[0];


--J1_q_a[2] is notetabs:u1|music:u4|altsyncram:altsyncram_component|altsyncram_v821:auto_generated|q_a[2]
--RAM Block Operation Mode: Single Port
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Registered
J1_q_a[2]_PORT_A_data_in = VCC;
J1_q_a[2]_PORT_A_data_in_reg = DFFE(J1_q_a[2]_PORT_A_data_in, J1_q_a[2]_clock_0, , , );
J1_q_a[2]_PORT_A_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[2]_PORT_A_address_reg = DFFE(J1_q_a[2]_PORT_A_address, J1_q_a[2]_clock_0, , , );
J1_q_a[2]_PORT_B_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[2]_PORT_B_address_reg = DFFE(J1_q_a[2]_PORT_B_address, J1_q_a[2]_clock_0, , , );
J1_q_a[2]_PORT_A_write_enable = GND;
J1_q_a[2]_PORT_A_write_enable_reg = DFFE(J1_q_a[2]_PORT_A_write_enable, J1_q_a[2]_clock_0, , , );
J1_q_a[2]_clock_0 = clk8hz;
J1_q_a[2]_PORT_A_data_out = MEMORY(J1_q_a[2]_PORT_A_data_in_reg, , J1_q_a[2]_PORT_A_address_reg, J1_q_a[2]_PORT_B_address_reg, J1_q_a[2]_PORT_A_write_enable_reg, , , , J1_q_a[2]_clock_0, , , , , );
J1_q_a[2]_PORT_A_data_out_reg = DFFE(J1_q_a[2]_PORT_A_data_out, J1_q_a[2]_clock_0, , , );
J1_q_a[2] = J1_q_a[2]_PORT_A_data_out_reg[0];


--J1_q_a[3] is notetabs:u1|music:u4|altsyncram:altsyncram_component|altsyncram_v821:auto_generated|q_a[3]
--RAM Block Operation Mode: Single Port
--Port A Depth: 256, Port A Width: 1
--Port A Logical Depth: 256, Port A Logical Width: 4
--Port A Input: Registered, Port A Output: Registered
J1_q_a[3]_PORT_A_data_in = VCC;
J1_q_a[3]_PORT_A_data_in_reg = DFFE(J1_q_a[3]_PORT_A_data_in, J1_q_a[3]_clock_0, , , );
J1_q_a[3]_PORT_A_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[3]_PORT_A_address_reg = DFFE(J1_q_a[3]_PORT_A_address, J1_q_a[3]_clock_0, , , );
J1_q_a[3]_PORT_B_address = BUS(G1_safe_q[0], G1_safe_q[1], G1_safe_q[2], G1_safe_q[3], G1_safe_q[4], G1_safe_q[5], G1_safe_q[6], G1_safe_q[7]);
J1_q_a[3]_PORT_B_address_reg = DFFE(J1_q_a[3]_PORT_B_address, J1_q_a[3]_clock_0, , , );
J1_q_a[3]_PORT_A_write_enable = GND;
J1_q_a[3]_PORT_A_write_enable_reg = DFFE(J1_q_a[3]_PORT_A_write_enable, J1_q_a[3]_clock_0, , , );
J1_q_a[3]_clock_0 = clk8hz;
J1_q_a[3]_PORT_A_data_out = MEMORY(J1_q_a[3]_PORT_A_data_in_reg, , J1_q_a[3]_PORT_A_address_reg, J1_q_a[3]_PORT_B_address_reg, J1_q_a[3]_PORT_A_write_enable_reg, , , , J1_q_a[3]_clock_0, , , , , );
J1_q_a[3]_PORT_A_data_out_reg = DFFE(J1_q_a[3]_PORT_A_data_out, J1_q_a[3]_clock_0, , , );
J1_q_a[3] = J1_q_a[3]_PORT_A_data_out_reg[0];


--C1L01 is tonetaba:u2|Mux~120
--operation mode is normal

C1L01 = J1_q_a[1] & J1_q_a[2] & !J1_q_a[3] # !J1_q_a[1] & (J1_q_a[0] & J1_q_a[2] # !J1_q_a[0] & J1_q_a[3]);


--C1L9 is tonetaba:u2|Mux~118
--operation mode is normal

C1L9 = J1_q_a[0] & J1_q_a[1] & !J1_q_a[2] & J1_q_a[3] # !J1_q_a[0] & J1_q_a[2] & (J1_q_a[1] $ !J1_q_a[3]);


--C1L5 is tonetaba:u2|code[2]~87
--operation mode is normal

C1L5 = LCELL(C1L5 & (C1L01 # C1L9) # !C1L5 & C1L01 & !C1L9);


--C1L11 is tonetaba:u2|Mux~122
--operation mode is normal

C1L11 = J1_q_a[1] & (J1_q_a[0] & !J1_q_a[3] # !J1_q_a[0] & !J1_q_a[2]) # !J1_q_a[1] & J1_q_a[3] & (J1_q_a[0] $ !J1_q_a[2]);


--C1L3 is tonetaba:u2|code[1]~88
--operation mode is normal

C1L3 = LCELL(C1L3 & (C1L11 # C1L9) # !C1L3 & C1L11 & !C1L9);


--C1L21 is tonetaba:u2|Mux~124
--operation mode is normal

C1L21 = J1_q_a[0] & (J1_q_a[2] $ (!J1_q_a[3] # !J1_q_a[1])) # !J1_q_a[0] & (J1_q_a[1] & J1_q_a[2] & !J1_q_a[3] # !J1_q_a[1] & J1_q_a[3]);


--C1L1 is tonetaba:u2|code[0]~89
--operation mode is normal

C1L1 = LCELL(C1L1 & (C1L21 # C1L9) # !C1L1 & C1L21 & !C1L9);


--C1L7 is tonetaba:u2|high~27
--operation mode is normal

C1L7 = LCELL(C1L7 & (J1_q_a[3] # C1L9) # !C1L7 & J1_q_a[3] & !C1L9);


--D1_fullspks is speakera:u3|fullspks
--operation mode is normal

D1_fullspks_lut_out = D1L7;
D1_fullspks = DFFEA(D1_fullspks_lut_out, D1L3, VCC, , , , );


--G1_safe_q[0] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[0]
--operation mode is arithmetic

G1_safe_q[0]_lut_out = !G1_safe_q[0];
G1_safe_q[0] = DFFEA(G1_safe_q[0]_lut_out, clk8hz, !B1L1, , , , );

--G1L2 is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

G1L2 = CARRY(G1_safe_q[0]);


--G1_safe_q[1] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[1]
--operation mode is arithmetic

G1_safe_q[1]_carry_eqn = G1L2;
G1_safe_q[1]_lut_out = G1_safe_q[1] $ G1_safe_q[1]_carry_eqn;
G1_safe_q[1] = DFFEA(G1_safe_q[1]_lut_out, clk8hz, !B1L1, , , , );

--G1L4 is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

G1L4 = CARRY(!G1L2 # !G1_safe_q[1]);


--G1_safe_q[2] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[2]
--operation mode is arithmetic

G1_safe_q[2]_carry_eqn = G1L4;
G1_safe_q[2]_lut_out = G1_safe_q[2] $ !G1_safe_q[2]_carry_eqn;
G1_safe_q[2] = DFFEA(G1_safe_q[2]_lut_out, clk8hz, !B1L1, , , , );

--G1L6 is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

G1L6 = CARRY(G1_safe_q[2] & !G1L4);


--G1_safe_q[3] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[3]
--operation mode is arithmetic

G1_safe_q[3]_carry_eqn = G1L6;
G1_safe_q[3]_lut_out = G1_safe_q[3] $ G1_safe_q[3]_carry_eqn;
G1_safe_q[3] = DFFEA(G1_safe_q[3]_lut_out, clk8hz, !B1L1, , , , );

--G1L8 is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|counter_cella3~COUT
--operation mode is arithmetic

G1L8 = CARRY(!G1L6 # !G1_safe_q[3]);


--G1_safe_q[4] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[4]
--operation mode is arithmetic

G1_safe_q[4]_carry_eqn = G1L8;
G1_safe_q[4]_lut_out = G1_safe_q[4] $ !G1_safe_q[4]_carry_eqn;
G1_safe_q[4] = DFFEA(G1_safe_q[4]_lut_out, clk8hz, !B1L1, , , , );

--G1L01 is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|counter_cella4~COUT
--operation mode is arithmetic

G1L01 = CARRY(G1_safe_q[4] & !G1L8);


--G1_safe_q[5] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[5]
--operation mode is arithmetic

G1_safe_q[5]_carry_eqn = G1L01;
G1_safe_q[5]_lut_out = G1_safe_q[5] $ G1_safe_q[5]_carry_eqn;
G1_safe_q[5] = DFFEA(G1_safe_q[5]_lut_out, clk8hz, !B1L1, , , , );

--G1L21 is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|counter_cella5~COUT
--operation mode is arithmetic

G1L21 = CARRY(!G1L01 # !G1_safe_q[5]);


--G1_safe_q[6] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[6]
--operation mode is arithmetic

G1_safe_q[6]_carry_eqn = G1L21;
G1_safe_q[6]_lut_out = G1_safe_q[6] $ !G1_safe_q[6]_carry_eqn;
G1_safe_q[6] = DFFEA(G1_safe_q[6]_lut_out, clk8hz, !B1L1, , , , );

--G1L41 is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|counter_cella6~COUT
--operation mode is arithmetic

G1L41 = CARRY(G1_safe_q[6] & !G1L21);


--G1_safe_q[7] is notetabs:u1|lpm_counter:counter_rtl_2|cntr_ia7:auto_generated|safe_q[7]
--operation mode is normal

G1_safe_q[7]_carry_eqn = G1L41;
G1_safe_q[7]_lut_out = G1_safe_q[7] $ G1_safe_q[7]_carry_eqn;
G1_safe_q[7] = DFFEA(G1_safe_q[7]_lut_out, clk8hz, !B1L1, , , , );


--L1_safe_q[0] is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|safe_q[0]
--operation mode is arithmetic

L1_safe_q[0]_lut_out = !L1_safe_q[0];
L1_safe_q[0]_sload_eqn = (D1L7 & C1L32) # (!D1L7 & L1_safe_q[0]_lut_out);
L1_safe_q[0] = DFFEA(L1_safe_q[0]_sload_eqn, D1L3, VCC, , , , );

--L1L2 is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

L1L2 = CARRY(L1_safe_q[0]);


--L1_safe_q[1] is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|safe_q[1]
--operation mode is arithmetic

L1_safe_q[1]_carry_eqn = L1L2;
L1_safe_q[1]_lut_out = L1_safe_q[1] $ L1_safe_q[1]_carry_eqn;
L1_safe_q[1]_sload_eqn = (D1L7 & C1L52) # (!D1L7 & L1_safe_q[1]_lut_out);
L1_safe_q[1] = DFFEA(L1_safe_q[1]_sload_eqn, D1L3, VCC, , , , );

--L1L4 is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

L1L4 = CARRY(!L1L2 # !L1_safe_q[1]);


--L1_safe_q[2] is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|safe_q[2]
--operation mode is arithmetic

L1_safe_q[2]_carry_eqn = L1L4;
L1_safe_q[2]_lut_out = L1_safe_q[2] $ !L1_safe_q[2]_carry_eqn;
L1_safe_q[2]_sload_eqn = (D1L7 & C1L72) # (!D1L7 & L1_safe_q[2]_lut_out);
L1_safe_q[2] = DFFEA(L1_safe_q[2]_sload_eqn, D1L3, VCC, , , , );

--L1L6 is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

L1L6 = CARRY(L1_safe_q[2] & !L1L4);


--L1_safe_q[3] is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|safe_q[3]
--operation mode is arithmetic

L1_safe_q[3]_carry_eqn = L1L6;
L1_safe_q[3]_lut_out = L1_safe_q[3] $ L1_safe_q[3]_carry_eqn;
L1_safe_q[3]_sload_eqn = (D1L7 & C1L92) # (!D1L7 & L1_safe_q[3]_lut_out);
L1_safe_q[3] = DFFEA(L1_safe_q[3]_sload_eqn, D1L3, VCC, , , , );

--L1L8 is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|counter_cella3~COUT
--operation mode is arithmetic

L1L8 = CARRY(!L1L6 # !L1_safe_q[3]);


--D1L4 is speakera:u3|reduce_nor~68
--operation mode is normal

D1L4 = !L1_safe_q[3] # !L1_safe_q[2] # !L1_safe_q[1] # !L1_safe_q[0];


--L1_safe_q[4] is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|safe_q[4]
--operation mode is arithmetic

L1_safe_q[4]_carry_eqn = L1L8;
L1_safe_q[4]_lut_out = L1_safe_q[4] $ !L1_safe_q[4]_carry_eqn;
L1_safe_q[4]_sload_eqn = (D1L7 & C1L13) # (!D1L7 & L1_safe_q[4]_lut_out);
L1_safe_q[4] = DFFEA(L1_safe_q[4]_sload_eqn, D1L3, VCC, , , , );

--L1L01 is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|counter_cella4~COUT
--operation mode is arithmetic

L1L01 = CARRY(L1_safe_q[4] & !L1L8);


--L1_safe_q[5] is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|safe_q[5]
--operation mode is arithmetic

L1_safe_q[5]_carry_eqn = L1L01;
L1_safe_q[5]_lut_out = L1_safe_q[5] $ L1_safe_q[5]_carry_eqn;
L1_safe_q[5]_sload_eqn = (D1L7 & C1L33) # (!D1L7 & L1_safe_q[5]_lut_out);
L1_safe_q[5] = DFFEA(L1_safe_q[5]_sload_eqn, D1L3, VCC, , , , );

--L1L21 is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|counter_cella5~COUT
--operation mode is arithmetic

L1L21 = CARRY(!L1L01 # !L1_safe_q[5]);


--L1_safe_q[6] is speakera:u3|lpm_counter:\genspks:count11[0]_rtl_0|cntr_7t7:auto_generated|safe_q[6]
--operation mode is arithmetic