freqtest.map.eqn

用VHDL语言设计的频率计

--D1_cqi[4] is counter32b:u3|cqi[4]
--operation mode is arithmetic

D1_cqi[4]_carry_eqn = D1L12;
D1_cqi[4]_lut_out = D1_cqi[4] $ !D1_cqi[4]_carry_eqn;
D1_cqi[4]_sload_eqn = (D1L611 & D1L18) # (!D1L611 & D1_cqi[4]_lut_out);
D1_cqi[4] = DFFEA(D1_cqi[4]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L32 is counter32b:u3|cqi[4]~COUT
--operation mode is arithmetic

D1L32 = CARRY(D1_cqi[4] & !D1L12);


--D1_cqi[3] is counter32b:u3|cqi[3]
--operation mode is arithmetic

D1_cqi[3]_carry_eqn = D1L91;
D1_cqi[3]_lut_out = D1_cqi[3] $ D1_cqi[3]_carry_eqn;
D1_cqi[3]_sload_eqn = (D1L611 & ~GND) # (!D1L611 & D1_cqi[3]_lut_out);
D1_cqi[3] = DFFEA(D1_cqi[3]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L12 is counter32b:u3|cqi[3]~COUT
--operation mode is arithmetic

D1L12 = CARRY(!D1L91 # !D1_cqi[3]);


--D1_cqi[2] is counter32b:u3|cqi[2]
--operation mode is arithmetic

D1_cqi[2]_carry_eqn = D1L71;
D1_cqi[2]_lut_out = D1_cqi[2] $ !D1_cqi[2]_carry_eqn;
D1_cqi[2]_sload_eqn = (D1L611 & ~GND) # (!D1L611 & D1_cqi[2]_lut_out);
D1_cqi[2] = DFFEA(D1_cqi[2]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L91 is counter32b:u3|cqi[2]~COUT
--operation mode is arithmetic

D1L91 = CARRY(D1_cqi[2] & !D1L71);


--D1_cqi[1] is counter32b:u3|cqi[1]
--operation mode is arithmetic

D1_cqi[1]_carry_eqn = D1L51;
D1_cqi[1]_lut_out = D1_cqi[1] $ D1_cqi[1]_carry_eqn;
D1_cqi[1]_sload_eqn = (D1L611 & ~GND) # (!D1L611 & D1_cqi[1]_lut_out);
D1_cqi[1] = DFFEA(D1_cqi[1]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L71 is counter32b:u3|cqi[1]~COUT
--operation mode is arithmetic

D1L71 = CARRY(!D1L51 # !D1_cqi[1]);


--D1_cqi[0] is counter32b:u3|cqi[0]
--operation mode is arithmetic

D1_cqi[0]_lut_out = !D1_cqi[0];
D1_cqi[0]_sload_eqn = (D1L611 & ~GND) # (!D1L611 & D1_cqi[0]_lut_out);
D1_cqi[0] = DFFEA(D1_cqi[0]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L51 is counter32b:u3|cqi[0]~COUT
--operation mode is arithmetic

D1L51 = CARRY(D1_cqi[0]);


--D1L011 is counter32b:u3|LessThan~37
--operation mode is normal

D1L011 = !D1_cqi[26] & !D1_cqi[25] & !D1_cqi[24] # !D1_cqi[27];


--D1L111 is counter32b:u3|LessThan~53
--operation mode is normal

D1L111 = !D1_cqi[22] & !D1_cqi[21] & !D1_cqi[20] # !D1_cqi[23];


--D1L211 is counter32b:u3|LessThan~69
--operation mode is normal

D1L211 = !D1_cqi[18] & !D1_cqi[17] & !D1_cqi[16] # !D1_cqi[19];


--D1L311 is counter32b:u3|LessThan~85
--operation mode is normal

D1L311 = !D1_cqi[14] & !D1_cqi[13] & !D1_cqi[12] # !D1_cqi[15];


--D1L511 is counter32b:u3|LessThan~117
--operation mode is normal

D1L511 = !D1_cqi[6] & !D1_cqi[5] & !D1_cqi[4] # !D1_cqi[7];


--D1L411 is counter32b:u3|LessThan~101
--operation mode is normal

D1L411 = !D1_cqi[10] & !D1_cqi[9] & !D1_cqi[8] # !D1_cqi[11];


--D1L28 is counter32b:u3|cqi~3974
--operation mode is normal

D1L28 = !D1L311 & !D1L511 & !D1L411;


--D1L77 is counter32b:u3|cqi~148
--operation mode is normal

D1L77 = D1L011 # D1L111 # D1L211 # !D1L28;


--D1L2 is counter32b:u3|add~20
--operation mode is normal

D1L2 = D1_cqi[30] & D1_cqi[29] & D1_cqi[28];


--D1L711 is counter32b:u3|LessThan~363
--operation mode is normal

D1L711 = D1_cqi[31] & (D1_cqi[30] # D1_cqi[29] # D1_cqi[28]);


--D1L38 is counter32b:u3|cqi~3975
--operation mode is normal

D1L38 = D1L77 & D1_cqi[31] # !D1L77 & !D1L711 & (D1_cqi[31] $ D1L2);


--B1_rst_cnt is ftctrl:u1|rst_cnt
--operation mode is normal

B1_rst_cnt = !B1_div2clk & !clk1hz;


--D1L611 is counter32b:u3|LessThan~133
--operation mode is normal

D1L611 = D1_cqi[3] & (D1_cqi[2] # D1_cqi[1] # D1_cqi[0]);


--D1L1 is counter32b:u3|add~15
--operation mode is normal

D1L1 = D1_cqi[29] & D1_cqi[28];


--D1L48 is counter32b:u3|cqi~3976
--operation mode is normal

D1L48 = D1L77 & D1_cqi[30] # !D1L77 & !D1L711 & (D1_cqi[30] $ D1L1);


--D1L58 is counter32b:u3|cqi~3977
--operation mode is normal

D1L58 = D1L77 & D1_cqi[29] # !D1L77 & !D1L711 & (D1_cqi[29] $ D1_cqi[28]);


--D1L68 is counter32b:u3|cqi~3978
--operation mode is normal

D1L68 = D1_cqi[28] & D1L77 # !D1_cqi[28] & !D1L77 & !D1L711;


--D1L4 is counter32b:u3|add~40
--operation mode is normal

D1L4 = D1_cqi[26] & D1_cqi[25] & D1_cqi[24];


--D1L78 is counter32b:u3|cqi~3979
--operation mode is normal

D1L78 = D1L28 & !D1L111 & !D1L211;


--D1L88 is counter32b:u3|cqi~3980
--operation mode is normal

D1L88 = D1L011 & (D1_cqi[27] $ (D1L4 & D1L78)) # !D1L011 & D1_cqi[27] & !D1L78;


--D1L3 is counter32b:u3|add~35
--operation mode is normal

D1L3 = D1_cqi[25] & D1_cqi[24];


--D1L98 is counter32b:u3|cqi~3981
--operation mode is normal

D1L98 = D1L011 & (D1_cqi[26] $ (D1L3 & D1L78)) # !D1L011 & D1_cqi[26] & !D1L78;


--D1L09 is counter32b:u3|cqi~3982
--operation mode is normal

D1L09 = D1L011 & (D1_cqi[25] $ (D1_cqi[24] & D1L78)) # !D1L011 & D1_cqi[25] & !D1L78;


--D1L19 is counter32b:u3|cqi~3983
--operation mode is normal

D1L19 = !D1L211 & !D1L311 & !D1L511 & !D1L411;


--D1L29 is counter32b:u3|cqi~3984
--operation mode is normal

D1L29 = D1_cqi[24] & (D1L111 # !D1L19) # !D1_cqi[24] & !D1L111 & D1L011 & D1L19;


--D1L6 is counter32b:u3|add~60
--operation mode is normal

D1L6 = D1_cqi[22] & D1_cqi[21] & D1_cqi[20];


--D1L39 is counter32b:u3|cqi~3985
--operation mode is normal

D1L39 = D1L111 & (D1_cqi[23] $ (D1L6 & D1L19)) # !D1L111 & D1_cqi[23] & !D1L19;


--D1L5 is counter32b:u3|add~55
--operation mode is normal

D1L5 = D1_cqi[21] & D1_cqi[20];


--D1L49 is counter32b:u3|cqi~3986
--operation mode is normal

D1L49 = D1L111 & (D1_cqi[22] $ (D1L5 & D1L19)) # !D1L111 & D1_cqi[22] & !D1L19;


--D1L59 is counter32b:u3|cqi~3987
--operation mode is normal

D1L59 = D1L111 & (D1_cqi[21] $ (D1_cqi[20] & D1L19)) # !D1L111 & D1_cqi[21] & !D1L19;


--D1L69 is counter32b:u3|cqi~3988
--operation mode is normal

D1L69 = D1L111 & (D1_cqi[20] $ D1L19) # !D1L111 & D1_cqi[20] & !D1L19;


--D1L8 is counter32b:u3|add~80
--operation mode is normal

D1L8 = D1_cqi[18] & D1_cqi[17] & D1_cqi[16];


--D1L79 is counter32b:u3|cqi~3989
--operation mode is normal

D1L79 = D1L211 & (D1_cqi[19] $ (D1L8 & D1L28)) # !D1L211 & D1_cqi[19] & !D1L28;


--D1L7 is counter32b:u3|add~75
--operation mode is normal

D1L7 = D1_cqi[17] & D1_cqi[16];


--D1L89 is counter32b:u3|cqi~3990
--operation mode is normal

D1L89 = D1L211 & (D1_cqi[18] $ (D1L7 & D1L28)) # !D1L211 & D1_cqi[18] & !D1L28;


--D1L99 is counter32b:u3|cqi~3991
--operation mode is normal

D1L99 = D1L211 & (D1_cqi[17] $ (D1_cqi[16] & D1L28)) # !D1L211 & D1_cqi[17] & !D1L28;


--D1L001 is counter32b:u3|cqi~3992
--operation mode is normal

D1L001 = D1L211 & (D1_cqi[16] $ D1L28) # !D1L211 & D1_cqi[16] & !D1L28;


--D1L01 is counter32b:u3|add~100
--operation mode is normal

D1L01 = D1_cqi[14] & D1_cqi[13] & D1_cqi[12];


--D1L101 is counter32b:u3|cqi~3993
--operation mode is normal

D1L101 = !D1L511 & !D1L411;


--D1L201 is counter32b:u3|cqi~3994
--operation mode is normal

D1L201 = D1L311 & (D1_cqi[15] $ (D1L01 & D1L101)) # !D1L311 & D1_cqi[15] & !D1L101;


--D1L9 is counter32b:u3|add~95
--operation mode is normal

D1L9 = D1_cqi[13] & D1_cqi[12];


--D1L301 is counter32b:u3|cqi~3995
--operation mode is normal

D1L301 = D1L311 & (D1_cqi[14] $ (D1L9 & D1L101)) # !D1L311 & D1_cqi[14] & !D1L101;


--D1L401 is counter32b:u3|cqi~3996
--operation mode is normal

D1L401 = D1L311 & (D1_cqi[13] $ (D1_cqi[12] & D1L101)) # !D1L311 & D1_cqi[13] & !D1L101;


--D1L501 is counter32b:u3|cqi~3997
--operation mode is normal

D1L501 = D1_cqi[12] & (D1L511 # D1L411) # !D1_cqi[12] & !D1L511 & !D1L411 & D1L311;


--D1L21 is counter32b:u3|add~120
--operation mode is normal

D1L21 = D1_cqi[10] & D1_cqi[9] & D1_cqi[8];


--D1L601 is counter32b:u3|cqi~3998
--operation mode is normal

D1L601 = D1L511 & D1_cqi[11] # !D1L511 & D1L411 & (D1_cqi[11] $ D1L21);


--D1L11 is counter32b:u3|add~115
--operation mode is normal

D1L11 = D1_cqi[9] & D1_cqi[8];


--D1L701 is counter32b:u3|cqi~3999
--operation mode is normal

D1L701 = D1L511 & D1_cqi[10] # !D1L511 & D1L411 & (D1_cqi[10] $ D1L11);


--D1L801 is counter32b:u3|cqi~4000
--operation mode is normal

D1L801 = D1L511 & D1_cqi[9] # !D1L511 & D1L411 & (D1_cqi[9] $ D1_cqi[8]);


--D1L901 is counter32b:u3|cqi~4001
--operation mode is normal

D1L901 = D1_cqi[8] & D1L511 # !D1_cqi[8] & !D1L511 & D1L411;


--D1L87 is counter32b:u3|cqi~1812
--operation mode is normal

D1L87 = D1_cqi[7] & !D1_cqi[6] & !D1_cqi[5] & !D1_cqi[4] # !D1_cqi[7] & D1_cqi[6] & D1_cqi[5] & D1_cqi[4];


--D1L97 is counter32b:u3|cqi~1813
--operation mode is normal

D1L97 = !D1_cqi[7] & (D1_cqi[6] $ (D1_cqi[5] & D1_cqi[4]));


--D1L08 is counter32b:u3|cqi~1814
--operation mode is normal

D1L08 = !D1_cqi[7] & (D1_cqi[5] $ D1_cqi[4]);


--D1L18 is counter32b:u3|cqi~1815
--operation mode is normal

D1L18 = !D1_cqi[4] & (!D1_cqi[6] & !D1_cqi[5] # !D1_cqi[7]);


--~GND is ~GND
--operation mode is normal

~GND = GND;


--fsin is fsin
--operation mode is input

fsin = INPUT();


--clk1hz is clk1hz
--operation mode is input

clk1hz = INPUT();


--dout[31] is dout[31]
--operation mode is output

dout[31] = OUTPUT(C1_dout[31]);


--dout[30] is dout[30]
--operation mode is output

dout[30] = OUTPUT(C1_dout[30]);


--dout[29] is dout[29]
--operation mode is output

dout[29] = OUTPUT(C1_dout[29]);


--dout[28] is dout[28]
--operation mode is output

dout[28] = OUTPUT(C1_dout[28]);


--dout[27] is dout[27]
--operation mode is output

dout[27] = OUTPUT(C1_dout[27]);


--dout[26] is dout[26]
--operation mode is output

dout[26] = OUTPUT(C1_dout[26]);


--dout[25] is dout[25]
--operation mode is output

dout[25] = OUTPUT(C1_dout[25]);


--dout[24] is dout[24]
--operation mode is output

dout[24] = OUTPUT(C1_dout[24]);


--dout[23] is dout[23]
--operation mode is output

dout[23] = OUTPUT(C1_dout[23]);


--dout[22] is dout[22]
--operation mode is output

dout[22] = OUTPUT(C1_dout[22]);


--dout[21] is dout[21]
--operation mode is output

dout[21] = OUTPUT(C1_dout[21]);


--dout[20] is dout[20]
--operation mode is output

dout[20] = OUTPUT(C1_dout[20]);


--dout[19] is dout[19]
--operation mode is output

dout[19] = OUTPUT(C1_dout[19]);


--dout[18] is dout[18]
--operation mode is output

dout[18] = OUTPUT(C1_dout[18]);


--dout[17] is dout[17]
--operation mode is output

dout[17] = OUTPUT(C1_dout[17]);


--dout[16] is dout[16]
--operation mode is output

dout[16] = OUTPUT(C1_dout[16]);


--dout[15] is dout[15]
--operation mode is output

dout[15] = OUTPUT(C1_dout[15]);


--dout[14] is dout[14]
--operation mode is output

dout[14] = OUTPUT(C1_dout[14]);


--dout[13] is dout[13]
--operation mode is output

dout[13] = OUTPUT(C1_dout[13]);


--dout[12] is dout[12]
--operation mode is output

dout[12] = OUTPUT(C1_dout[12]);


--dout[11] is dout[11]
--operation mode is output

dout[11] = OUTPUT(C1_dout[11]);


--dout[10] is dout[10]
--operation mode is output

dout[10] = OUTPUT(C1_dout[10]);


--dout[9] is dout[9]
--operation mode is output

dout[9] = OUTPUT(C1_dout[9]);


--dout[8] is dout[8]
--operation mode is output

dout[8] = OUTPUT(C1_dout[8]);


--dout[7] is dout[7]
--operation mode is output

dout[7] = OUTPUT(C1_dout[7]);


--dout[6] is dout[6]
--operation mode is output

dout[6] = OUTPUT(C1_dout[6]);


--dout[5] is dout[5]
--operation mode is output

dout[5] = OUTPUT(C1_dout[5]);


--dout[4] is dout[4]
--operation mode is output

dout[4] = OUTPUT(C1_dout[4]);


--dout[3] is dout[3]
--operation mode is output

dout[3] = OUTPUT(C1_dout[3]);


--dout[2] is dout[2]
--operation mode is output

dout[2] = OUTPUT(C1_dout[2]);


--dout[1] is dout[1]
--operation mode is output

dout[1] = OUTPUT(C1_dout[1]);


--dout[0] is dout[0]
--operation mode is output

dout[0] = OUTPUT(C1_dout[0]);