freqtest.map.eqn

用VHDL语言设计的频率计

--C1_dout[31] is reg32b:u2|dout[31]
--operation mode is normal

C1_dout[31]_lut_out = D1_cqi[31];
C1_dout[31] = DFFEA(C1_dout[31]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[30] is reg32b:u2|dout[30]
--operation mode is normal

C1_dout[30]_lut_out = D1_cqi[30];
C1_dout[30] = DFFEA(C1_dout[30]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[29] is reg32b:u2|dout[29]
--operation mode is normal

C1_dout[29]_lut_out = D1_cqi[29];
C1_dout[29] = DFFEA(C1_dout[29]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[28] is reg32b:u2|dout[28]
--operation mode is normal

C1_dout[28]_lut_out = D1_cqi[28];
C1_dout[28] = DFFEA(C1_dout[28]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[27] is reg32b:u2|dout[27]
--operation mode is normal

C1_dout[27]_lut_out = D1_cqi[27];
C1_dout[27] = DFFEA(C1_dout[27]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[26] is reg32b:u2|dout[26]
--operation mode is normal

C1_dout[26]_lut_out = D1_cqi[26];
C1_dout[26] = DFFEA(C1_dout[26]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[25] is reg32b:u2|dout[25]
--operation mode is normal

C1_dout[25]_lut_out = D1_cqi[25];
C1_dout[25] = DFFEA(C1_dout[25]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[24] is reg32b:u2|dout[24]
--operation mode is normal

C1_dout[24]_lut_out = D1_cqi[24];
C1_dout[24] = DFFEA(C1_dout[24]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[23] is reg32b:u2|dout[23]
--operation mode is normal

C1_dout[23]_lut_out = D1_cqi[23];
C1_dout[23] = DFFEA(C1_dout[23]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[22] is reg32b:u2|dout[22]
--operation mode is normal

C1_dout[22]_lut_out = D1_cqi[22];
C1_dout[22] = DFFEA(C1_dout[22]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[21] is reg32b:u2|dout[21]
--operation mode is normal

C1_dout[21]_lut_out = D1_cqi[21];
C1_dout[21] = DFFEA(C1_dout[21]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[20] is reg32b:u2|dout[20]
--operation mode is normal

C1_dout[20]_lut_out = D1_cqi[20];
C1_dout[20] = DFFEA(C1_dout[20]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[19] is reg32b:u2|dout[19]
--operation mode is normal

C1_dout[19]_lut_out = D1_cqi[19];
C1_dout[19] = DFFEA(C1_dout[19]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[18] is reg32b:u2|dout[18]
--operation mode is normal

C1_dout[18]_lut_out = D1_cqi[18];
C1_dout[18] = DFFEA(C1_dout[18]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[17] is reg32b:u2|dout[17]
--operation mode is normal

C1_dout[17]_lut_out = D1_cqi[17];
C1_dout[17] = DFFEA(C1_dout[17]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[16] is reg32b:u2|dout[16]
--operation mode is normal

C1_dout[16]_lut_out = D1_cqi[16];
C1_dout[16] = DFFEA(C1_dout[16]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[15] is reg32b:u2|dout[15]
--operation mode is normal

C1_dout[15]_lut_out = D1_cqi[15];
C1_dout[15] = DFFEA(C1_dout[15]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[14] is reg32b:u2|dout[14]
--operation mode is normal

C1_dout[14]_lut_out = D1_cqi[14];
C1_dout[14] = DFFEA(C1_dout[14]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[13] is reg32b:u2|dout[13]
--operation mode is normal

C1_dout[13]_lut_out = D1_cqi[13];
C1_dout[13] = DFFEA(C1_dout[13]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[12] is reg32b:u2|dout[12]
--operation mode is normal

C1_dout[12]_lut_out = D1_cqi[12];
C1_dout[12] = DFFEA(C1_dout[12]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[11] is reg32b:u2|dout[11]
--operation mode is normal

C1_dout[11]_lut_out = D1_cqi[11];
C1_dout[11] = DFFEA(C1_dout[11]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[10] is reg32b:u2|dout[10]
--operation mode is normal

C1_dout[10]_lut_out = D1_cqi[10];
C1_dout[10] = DFFEA(C1_dout[10]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[9] is reg32b:u2|dout[9]
--operation mode is normal

C1_dout[9]_lut_out = D1_cqi[9];
C1_dout[9] = DFFEA(C1_dout[9]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[8] is reg32b:u2|dout[8]
--operation mode is normal

C1_dout[8]_lut_out = D1_cqi[8];
C1_dout[8] = DFFEA(C1_dout[8]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[7] is reg32b:u2|dout[7]
--operation mode is normal

C1_dout[7]_lut_out = D1_cqi[7];
C1_dout[7] = DFFEA(C1_dout[7]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[6] is reg32b:u2|dout[6]
--operation mode is normal

C1_dout[6]_lut_out = D1_cqi[6];
C1_dout[6] = DFFEA(C1_dout[6]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[5] is reg32b:u2|dout[5]
--operation mode is normal

C1_dout[5]_lut_out = D1_cqi[5];
C1_dout[5] = DFFEA(C1_dout[5]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[4] is reg32b:u2|dout[4]
--operation mode is normal

C1_dout[4]_lut_out = D1_cqi[4];
C1_dout[4] = DFFEA(C1_dout[4]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[3] is reg32b:u2|dout[3]
--operation mode is normal

C1_dout[3]_lut_out = D1_cqi[3];
C1_dout[3] = DFFEA(C1_dout[3]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[2] is reg32b:u2|dout[2]
--operation mode is normal

C1_dout[2]_lut_out = D1_cqi[2];
C1_dout[2] = DFFEA(C1_dout[2]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[1] is reg32b:u2|dout[1]
--operation mode is normal

C1_dout[1]_lut_out = D1_cqi[1];
C1_dout[1] = DFFEA(C1_dout[1]_lut_out, !B1_div2clk, VCC, , , , );


--C1_dout[0] is reg32b:u2|dout[0]
--operation mode is normal

C1_dout[0]_lut_out = D1_cqi[0];
C1_dout[0] = DFFEA(C1_dout[0]_lut_out, !B1_div2clk, VCC, , , , );


--D1_cqi[31] is counter32b:u3|cqi[31]
--operation mode is normal

D1_cqi[31]_carry_eqn = D1L57;
D1_cqi[31]_lut_out = D1_cqi[31] $ D1_cqi[31]_carry_eqn;
D1_cqi[31]_sload_eqn = (D1L611 & D1L38) # (!D1L611 & D1_cqi[31]_lut_out);
D1_cqi[31] = DFFEA(D1_cqi[31]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );


--B1_div2clk is ftctrl:u1|div2clk
--operation mode is normal

B1_div2clk_lut_out = !B1_div2clk;
B1_div2clk = DFFEA(B1_div2clk_lut_out, clk1hz, VCC, , , , );


--D1_cqi[30] is counter32b:u3|cqi[30]
--operation mode is arithmetic

D1_cqi[30]_carry_eqn = D1L37;
D1_cqi[30]_lut_out = D1_cqi[30] $ !D1_cqi[30]_carry_eqn;
D1_cqi[30]_sload_eqn = (D1L611 & D1L48) # (!D1L611 & D1_cqi[30]_lut_out);
D1_cqi[30] = DFFEA(D1_cqi[30]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L57 is counter32b:u3|cqi[30]~COUT
--operation mode is arithmetic

D1L57 = CARRY(D1_cqi[30] & !D1L37);


--D1_cqi[29] is counter32b:u3|cqi[29]
--operation mode is arithmetic

D1_cqi[29]_carry_eqn = D1L17;
D1_cqi[29]_lut_out = D1_cqi[29] $ D1_cqi[29]_carry_eqn;
D1_cqi[29]_sload_eqn = (D1L611 & D1L58) # (!D1L611 & D1_cqi[29]_lut_out);
D1_cqi[29] = DFFEA(D1_cqi[29]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L37 is counter32b:u3|cqi[29]~COUT
--operation mode is arithmetic

D1L37 = CARRY(!D1L17 # !D1_cqi[29]);


--D1_cqi[28] is counter32b:u3|cqi[28]
--operation mode is arithmetic

D1_cqi[28]_carry_eqn = D1L96;
D1_cqi[28]_lut_out = D1_cqi[28] $ !D1_cqi[28]_carry_eqn;
D1_cqi[28]_sload_eqn = (D1L611 & D1L68) # (!D1L611 & D1_cqi[28]_lut_out);
D1_cqi[28] = DFFEA(D1_cqi[28]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L17 is counter32b:u3|cqi[28]~COUT
--operation mode is arithmetic

D1L17 = CARRY(D1_cqi[28] & !D1L96);


--D1_cqi[27] is counter32b:u3|cqi[27]
--operation mode is arithmetic

D1_cqi[27]_carry_eqn = D1L76;
D1_cqi[27]_lut_out = D1_cqi[27] $ D1_cqi[27]_carry_eqn;
D1_cqi[27]_sload_eqn = (D1L611 & D1L88) # (!D1L611 & D1_cqi[27]_lut_out);
D1_cqi[27] = DFFEA(D1_cqi[27]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L96 is counter32b:u3|cqi[27]~COUT
--operation mode is arithmetic

D1L96 = CARRY(!D1L76 # !D1_cqi[27]);


--D1_cqi[26] is counter32b:u3|cqi[26]
--operation mode is arithmetic

D1_cqi[26]_carry_eqn = D1L56;
D1_cqi[26]_lut_out = D1_cqi[26] $ !D1_cqi[26]_carry_eqn;
D1_cqi[26]_sload_eqn = (D1L611 & D1L98) # (!D1L611 & D1_cqi[26]_lut_out);
D1_cqi[26] = DFFEA(D1_cqi[26]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L76 is counter32b:u3|cqi[26]~COUT
--operation mode is arithmetic

D1L76 = CARRY(D1_cqi[26] & !D1L56);


--D1_cqi[25] is counter32b:u3|cqi[25]
--operation mode is arithmetic

D1_cqi[25]_carry_eqn = D1L36;
D1_cqi[25]_lut_out = D1_cqi[25] $ D1_cqi[25]_carry_eqn;
D1_cqi[25]_sload_eqn = (D1L611 & D1L09) # (!D1L611 & D1_cqi[25]_lut_out);
D1_cqi[25] = DFFEA(D1_cqi[25]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L56 is counter32b:u3|cqi[25]~COUT
--operation mode is arithmetic

D1L56 = CARRY(!D1L36 # !D1_cqi[25]);


--D1_cqi[24] is counter32b:u3|cqi[24]
--operation mode is arithmetic

D1_cqi[24]_carry_eqn = D1L16;
D1_cqi[24]_lut_out = D1_cqi[24] $ !D1_cqi[24]_carry_eqn;
D1_cqi[24]_sload_eqn = (D1L611 & D1L29) # (!D1L611 & D1_cqi[24]_lut_out);
D1_cqi[24] = DFFEA(D1_cqi[24]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L36 is counter32b:u3|cqi[24]~COUT
--operation mode is arithmetic

D1L36 = CARRY(D1_cqi[24] & !D1L16);


--D1_cqi[23] is counter32b:u3|cqi[23]
--operation mode is arithmetic

D1_cqi[23]_carry_eqn = D1L95;
D1_cqi[23]_lut_out = D1_cqi[23] $ D1_cqi[23]_carry_eqn;
D1_cqi[23]_sload_eqn = (D1L611 & D1L39) # (!D1L611 & D1_cqi[23]_lut_out);
D1_cqi[23] = DFFEA(D1_cqi[23]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L16 is counter32b:u3|cqi[23]~COUT
--operation mode is arithmetic

D1L16 = CARRY(!D1L95 # !D1_cqi[23]);


--D1_cqi[22] is counter32b:u3|cqi[22]
--operation mode is arithmetic

D1_cqi[22]_carry_eqn = D1L75;
D1_cqi[22]_lut_out = D1_cqi[22] $ !D1_cqi[22]_carry_eqn;
D1_cqi[22]_sload_eqn = (D1L611 & D1L49) # (!D1L611 & D1_cqi[22]_lut_out);
D1_cqi[22] = DFFEA(D1_cqi[22]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L95 is counter32b:u3|cqi[22]~COUT
--operation mode is arithmetic

D1L95 = CARRY(D1_cqi[22] & !D1L75);


--D1_cqi[21] is counter32b:u3|cqi[21]
--operation mode is arithmetic

D1_cqi[21]_carry_eqn = D1L55;
D1_cqi[21]_lut_out = D1_cqi[21] $ D1_cqi[21]_carry_eqn;
D1_cqi[21]_sload_eqn = (D1L611 & D1L59) # (!D1L611 & D1_cqi[21]_lut_out);
D1_cqi[21] = DFFEA(D1_cqi[21]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L75 is counter32b:u3|cqi[21]~COUT
--operation mode is arithmetic

D1L75 = CARRY(!D1L55 # !D1_cqi[21]);


--D1_cqi[20] is counter32b:u3|cqi[20]
--operation mode is arithmetic

D1_cqi[20]_carry_eqn = D1L35;
D1_cqi[20]_lut_out = D1_cqi[20] $ !D1_cqi[20]_carry_eqn;
D1_cqi[20]_sload_eqn = (D1L611 & D1L69) # (!D1L611 & D1_cqi[20]_lut_out);
D1_cqi[20] = DFFEA(D1_cqi[20]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L55 is counter32b:u3|cqi[20]~COUT
--operation mode is arithmetic

D1L55 = CARRY(D1_cqi[20] & !D1L35);


--D1_cqi[19] is counter32b:u3|cqi[19]
--operation mode is arithmetic

D1_cqi[19]_carry_eqn = D1L15;
D1_cqi[19]_lut_out = D1_cqi[19] $ D1_cqi[19]_carry_eqn;
D1_cqi[19]_sload_eqn = (D1L611 & D1L79) # (!D1L611 & D1_cqi[19]_lut_out);
D1_cqi[19] = DFFEA(D1_cqi[19]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L35 is counter32b:u3|cqi[19]~COUT
--operation mode is arithmetic

D1L35 = CARRY(!D1L15 # !D1_cqi[19]);


--D1_cqi[18] is counter32b:u3|cqi[18]
--operation mode is arithmetic

D1_cqi[18]_carry_eqn = D1L94;
D1_cqi[18]_lut_out = D1_cqi[18] $ !D1_cqi[18]_carry_eqn;
D1_cqi[18]_sload_eqn = (D1L611 & D1L89) # (!D1L611 & D1_cqi[18]_lut_out);
D1_cqi[18] = DFFEA(D1_cqi[18]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L15 is counter32b:u3|cqi[18]~COUT
--operation mode is arithmetic

D1L15 = CARRY(D1_cqi[18] & !D1L94);


--D1_cqi[17] is counter32b:u3|cqi[17]
--operation mode is arithmetic

D1_cqi[17]_carry_eqn = D1L74;
D1_cqi[17]_lut_out = D1_cqi[17] $ D1_cqi[17]_carry_eqn;
D1_cqi[17]_sload_eqn = (D1L611 & D1L99) # (!D1L611 & D1_cqi[17]_lut_out);
D1_cqi[17] = DFFEA(D1_cqi[17]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L94 is counter32b:u3|cqi[17]~COUT
--operation mode is arithmetic

D1L94 = CARRY(!D1L74 # !D1_cqi[17]);


--D1_cqi[16] is counter32b:u3|cqi[16]
--operation mode is arithmetic

D1_cqi[16]_carry_eqn = D1L54;
D1_cqi[16]_lut_out = D1_cqi[16] $ !D1_cqi[16]_carry_eqn;
D1_cqi[16]_sload_eqn = (D1L611 & D1L001) # (!D1L611 & D1_cqi[16]_lut_out);
D1_cqi[16] = DFFEA(D1_cqi[16]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L74 is counter32b:u3|cqi[16]~COUT
--operation mode is arithmetic

D1L74 = CARRY(D1_cqi[16] & !D1L54);


--D1_cqi[15] is counter32b:u3|cqi[15]
--operation mode is arithmetic

D1_cqi[15]_carry_eqn = D1L34;
D1_cqi[15]_lut_out = D1_cqi[15] $ D1_cqi[15]_carry_eqn;
D1_cqi[15]_sload_eqn = (D1L611 & D1L201) # (!D1L611 & D1_cqi[15]_lut_out);
D1_cqi[15] = DFFEA(D1_cqi[15]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L54 is counter32b:u3|cqi[15]~COUT
--operation mode is arithmetic

D1L54 = CARRY(!D1L34 # !D1_cqi[15]);


--D1_cqi[14] is counter32b:u3|cqi[14]
--operation mode is arithmetic

D1_cqi[14]_carry_eqn = D1L14;
D1_cqi[14]_lut_out = D1_cqi[14] $ !D1_cqi[14]_carry_eqn;
D1_cqi[14]_sload_eqn = (D1L611 & D1L301) # (!D1L611 & D1_cqi[14]_lut_out);
D1_cqi[14] = DFFEA(D1_cqi[14]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L34 is counter32b:u3|cqi[14]~COUT
--operation mode is arithmetic

D1L34 = CARRY(D1_cqi[14] & !D1L14);


--D1_cqi[13] is counter32b:u3|cqi[13]
--operation mode is arithmetic

D1_cqi[13]_carry_eqn = D1L93;
D1_cqi[13]_lut_out = D1_cqi[13] $ D1_cqi[13]_carry_eqn;
D1_cqi[13]_sload_eqn = (D1L611 & D1L401) # (!D1L611 & D1_cqi[13]_lut_out);
D1_cqi[13] = DFFEA(D1_cqi[13]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L14 is counter32b:u3|cqi[13]~COUT
--operation mode is arithmetic

D1L14 = CARRY(!D1L93 # !D1_cqi[13]);


--D1_cqi[12] is counter32b:u3|cqi[12]
--operation mode is arithmetic

D1_cqi[12]_carry_eqn = D1L73;
D1_cqi[12]_lut_out = D1_cqi[12] $ !D1_cqi[12]_carry_eqn;
D1_cqi[12]_sload_eqn = (D1L611 & D1L501) # (!D1L611 & D1_cqi[12]_lut_out);
D1_cqi[12] = DFFEA(D1_cqi[12]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L93 is counter32b:u3|cqi[12]~COUT
--operation mode is arithmetic

D1L93 = CARRY(D1_cqi[12] & !D1L73);


--D1_cqi[11] is counter32b:u3|cqi[11]
--operation mode is arithmetic

D1_cqi[11]_carry_eqn = D1L53;
D1_cqi[11]_lut_out = D1_cqi[11] $ D1_cqi[11]_carry_eqn;
D1_cqi[11]_sload_eqn = (D1L611 & D1L601) # (!D1L611 & D1_cqi[11]_lut_out);
D1_cqi[11] = DFFEA(D1_cqi[11]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L73 is counter32b:u3|cqi[11]~COUT
--operation mode is arithmetic

D1L73 = CARRY(!D1L53 # !D1_cqi[11]);


--D1_cqi[10] is counter32b:u3|cqi[10]
--operation mode is arithmetic

D1_cqi[10]_carry_eqn = D1L33;
D1_cqi[10]_lut_out = D1_cqi[10] $ !D1_cqi[10]_carry_eqn;
D1_cqi[10]_sload_eqn = (D1L611 & D1L701) # (!D1L611 & D1_cqi[10]_lut_out);
D1_cqi[10] = DFFEA(D1_cqi[10]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L53 is counter32b:u3|cqi[10]~COUT
--operation mode is arithmetic

D1L53 = CARRY(D1_cqi[10] & !D1L33);


--D1_cqi[9] is counter32b:u3|cqi[9]
--operation mode is arithmetic

D1_cqi[9]_carry_eqn = D1L13;
D1_cqi[9]_lut_out = D1_cqi[9] $ D1_cqi[9]_carry_eqn;
D1_cqi[9]_sload_eqn = (D1L611 & D1L801) # (!D1L611 & D1_cqi[9]_lut_out);
D1_cqi[9] = DFFEA(D1_cqi[9]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L33 is counter32b:u3|cqi[9]~COUT
--operation mode is arithmetic

D1L33 = CARRY(!D1L13 # !D1_cqi[9]);


--D1_cqi[8] is counter32b:u3|cqi[8]
--operation mode is arithmetic

D1_cqi[8]_carry_eqn = D1L92;
D1_cqi[8]_lut_out = D1_cqi[8] $ !D1_cqi[8]_carry_eqn;
D1_cqi[8]_sload_eqn = (D1L611 & D1L901) # (!D1L611 & D1_cqi[8]_lut_out);
D1_cqi[8] = DFFEA(D1_cqi[8]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L13 is counter32b:u3|cqi[8]~COUT
--operation mode is arithmetic

D1L13 = CARRY(D1_cqi[8] & !D1L92);


--D1_cqi[7] is counter32b:u3|cqi[7]
--operation mode is arithmetic

D1_cqi[7]_carry_eqn = D1L72;
D1_cqi[7]_lut_out = D1_cqi[7] $ D1_cqi[7]_carry_eqn;
D1_cqi[7]_sload_eqn = (D1L611 & D1L87) # (!D1L611 & D1_cqi[7]_lut_out);
D1_cqi[7] = DFFEA(D1_cqi[7]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L92 is counter32b:u3|cqi[7]~COUT
--operation mode is arithmetic

D1L92 = CARRY(!D1L72 # !D1_cqi[7]);


--D1_cqi[6] is counter32b:u3|cqi[6]
--operation mode is arithmetic

D1_cqi[6]_carry_eqn = D1L52;
D1_cqi[6]_lut_out = D1_cqi[6] $ !D1_cqi[6]_carry_eqn;
D1_cqi[6]_sload_eqn = (D1L611 & D1L97) # (!D1L611 & D1_cqi[6]_lut_out);
D1_cqi[6] = DFFEA(D1_cqi[6]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L72 is counter32b:u3|cqi[6]~COUT
--operation mode is arithmetic

D1L72 = CARRY(D1_cqi[6] & !D1L52);


--D1_cqi[5] is counter32b:u3|cqi[5]
--operation mode is arithmetic

D1_cqi[5]_carry_eqn = D1L32;
D1_cqi[5]_lut_out = D1_cqi[5] $ D1_cqi[5]_carry_eqn;
D1_cqi[5]_sload_eqn = (D1L611 & D1L08) # (!D1L611 & D1_cqi[5]_lut_out);
D1_cqi[5] = DFFEA(D1_cqi[5]_sload_eqn, fsin, !B1_rst_cnt, , B1_div2clk, , );

--D1L52 is counter32b:u3|cqi[5]~COUT
--operation mode is arithmetic

D1L52 = CARRY(!D1L32 # !D1_cqi[5]);