freqtest.fit.summary

用VHDL语言设计的频率计

Flow Status : Successful - Sat Oct 20 13:49:50 2007
Quartus II Version : 4.1 Build 181 06/29/2004 SJ Full Version
Revision Name : freqtest
Top-level Entity Name : freqtest
Family : Cyclone
Device : EP1C12Q240C8
Timing Models : Production
Total logic elements : 120 / 12,060 ( < 1 % )
Total pins : 34 / 173 ( 19 % )
Total memory bits : 0 / 239,616 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )