ca0106.h

h内核

#define SPCS_ORIGINAL_SAMPLE_RATE_NONE	0x00000000 /* Original Sample rate not indicated	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_16000	0x00000010 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_RES1	0x00000020 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_32000	0x00000030 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_12000	0x00000040 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_11025	0x00000050 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_8000	0x00000060 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_RES2	0x00000070 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_192000 0x00000080 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_24000	0x00000090 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_96000	0x000000a0 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_48000	0x000000b0 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_176400 0x000000c0 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_22050	0x000000d0 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_88200	0x000000e0 /* Original Sample rate	*/
#define SPCS_ORIGINAL_SAMPLE_RATE_44100	0x000000f0 /* Original Sample rate	*/

#define SPDIF_SELECT1		0x45		/* Enables SPDIF or Analogue outputs 0-SPDIF, 0xf00-Analogue */
						/* 0x100 - Front, 0x800 - Rear, 0x200 - Center/LFE.
						 * But as the jack is shared, use 0xf00.
						 * The Windows2000 driver uses 0x0000000f for both digital and analog.
						 * 0xf00 introduces interesting noises onto the Center/LFE.
						 * If you turn the volume up, you hear computer noise,
						 * e.g. mouse moving, changing between app windows etc.
						 * So, I am going to set this to 0x0000000f all the time now,
						 * same as the windows driver does.
						 * Use register SPDIF_SELECT2(0x72) to switch between SPDIF and Analog.
						 */
						/* When Channel = 0:
						 * Wide SPDIF format [3:0] (one bit for each channel) (0=20bit, 1=24bit)
						 * Tristate SPDIF Output [11:8] (one bit for each channel) (0=Not tristate, 1=Tristate)
						 * SPDIF Bypass enable [19:16] (one bit for each channel) (0=Not bypass, 1=Bypass)
						 */
						/* When Channel = 1:
						 * SPDIF 0 User data [7:0]
						 * SPDIF 1 User data [15:8]
						 * SPDIF 0 User data [23:16]
						 * SPDIF 0 User data [31:24]
						 * User data can be sent by using the SPDIF output frame pending and SPDIF output user bit interrupts.
						 */
#define WATERMARK		0x46		/* Test bit to indicate cache usage level */
#define SPDIF_INPUT_STATUS	0x49		/* SPDIF Input status register. Bits the same as SPCS.
						 * When Channel = 0: Bits the same as SPCS channel 0.
						 * When Channel = 1: Bits the same as SPCS channel 1.
						 * When Channel = 2:
						 * SPDIF Input User data [16:0]
						 * SPDIF Input Frame count [21:16]
						 */
#define CAPTURE_CACHE_DATA	0x50		/* 0x50-0x5f Recorded samples. */
#define CAPTURE_SOURCE          0x60            /* Capture Source 0 = MIC */
#define CAPTURE_SOURCE_CHANNEL0 0xf0000000	/* Mask for selecting the Capture sources */
#define CAPTURE_SOURCE_CHANNEL1 0x0f000000	/* 0 - SPDIF mixer output. */
#define CAPTURE_SOURCE_CHANNEL2 0x00f00000      /* 1 - What you hear or . 2 - ?? */
#define CAPTURE_SOURCE_CHANNEL3 0x000f0000	/* 3 - Mic in, Line in, TAD in, Aux in. */
#define CAPTURE_SOURCE_RECORD_MAP 0x0000ffff	/* Default 0x00e4 */
						/* Record Map [7:0] (2 bits per channel) 0=mapped to channel 0, 1=mapped to channel 1, 2=mapped to channel2, 3=mapped to channel3 
						 * Record source select for channel 0 [18:16]
						 * Record source select for channel 1 [22:20]
						 * Record source select for channel 2 [26:24]
						 * Record source select for channel 3 [30:28]
						 * 0 - SPDIF mixer output.
						 * 1 - i2s mixer output.
						 * 2 - SPDIF input.
						 * 3 - i2s input.
						 * 4 - AC97 capture.
						 * 5 - SRC output.
						 */
#define CAPTURE_VOLUME1         0x61            /* Capture  volume per channel 0-3 */
#define CAPTURE_VOLUME2         0x62            /* Capture  volume per channel 4-7 */

#define PLAYBACK_ROUTING1       0x63            /* Playback routing of channels 0-7. Effects AC3 output. Default 0x32765410 */
#define ROUTING1_REAR           0x77000000      /* Channel_id 0 sends to 10, Channel_id 1 sends to 32 */
#define ROUTING1_NULL           0x00770000      /* Channel_id 2 sends to 54, Channel_id 3 sends to 76 */
#define ROUTING1_CENTER_LFE     0x00007700      /* 0x32765410 means, send Channel_id 0 to FRONT, Channel_id 1 to REAR */
#define ROUTING1_FRONT          0x00000077	/* Channel_id 2 to CENTER_LFE, Channel_id 3 to NULL. */
						/* Channel_id's handle stereo channels. Channel X is a single mono channel */
						/* Host is input from the PCI bus. */
						/* Host channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
						 * Host channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
						 * Host channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
						 * Host channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
						 * Host channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
						 * Host channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
						 * Host channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
						 * Host channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
						 */

#define PLAYBACK_ROUTING2       0x64            /* Playback Routing . Feeding Capture channels back into Playback. Effects AC3 output. Default 0x76767676 */
						/* SRC is input from the capture inputs. */
						/* SRC channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
						 * SRC channel 1 [6:4] -> SPDIF Mixer/Router channel 0-7.
						 * SRC channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
						 * SRC channel 3 [14:12] -> SPDIF Mixer/Router channel 0-7.
						 * SRC channel 4 [18:16] -> SPDIF Mixer/Router channel 0-7.
						 * SRC channel 5 [22:20] -> SPDIF Mixer/Router channel 0-7.
						 * SRC channel 6 [26:24] -> SPDIF Mixer/Router channel 0-7.
						 * SRC channel 7 [30:28] -> SPDIF Mixer/Router channel 0-7.
						 */

#define PLAYBACK_MUTE           0x65            /* Unknown. While playing 0x0, while silent 0x00fc0000 */
						/* SPDIF Mixer input control:
						 * Invert SRC to SPDIF Mixer [7-0] (One bit per channel)
						 * Invert Host to SPDIF Mixer [15:8] (One bit per channel)
						 * SRC to SPDIF Mixer disable [23:16] (One bit per channel)
						 * Host to SPDIF Mixer disable [31:24] (One bit per channel)
						 */
#define PLAYBACK_VOLUME1        0x66            /* Playback SPDIF volume per channel. Set to the same PLAYBACK_VOLUME(0x6a) */
						/* PLAYBACK_VOLUME1 must be set to 30303030 for SPDIF AC3 Playback */
						/* SPDIF mixer input volume. 0=12dB, 0x30=0dB, 0xFE=-51.5dB, 0xff=Mute */
						/* One register for each of the 4 stereo streams. */
						/* SRC Right volume [7:0]
						 * SRC Left  volume [15:8]
						 * Host Right volume [23:16]
						 * Host Left  volume [31:24]
						 */
#define CAPTURE_ROUTING1        0x67            /* Capture Routing. Default 0x32765410 */
						/* Similar to register 0x63, except that the destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instead of SPDIF. */
#define CAPTURE_ROUTING2        0x68            /* Unknown Routing. Default 0x76767676 */
						/* Similar to register 0x64, except that the destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instead of SPDIF. */
#define CAPTURE_MUTE            0x69            /* Unknown. While capturing 0x0, while silent 0x00fc0000 */
						/* Similar to register 0x65, except that the destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instead of SPDIF. */
#define PLAYBACK_VOLUME2        0x6a            /* Playback Analog volume per channel. Does not effect AC3 output */
						/* Similar to register 0x66, except that the destination is the I2S mixer instead of the SPDIF mixer. I.E. Outputs to the Analog outputs instead of SPDIF. */
#define UNKNOWN6b               0x6b            /* Unknown. Readonly. Default 00400000 00400000 00400000 00400000 */
#define UART_A_DATA		0x6c            /* Uart, used in setting sample rates, bits per sample etc. */
#define UART_A_CMD		0x6d            /* Uart, used in setting sample rates, bits per sample etc. */
#define UART_B_DATA		0x6e            /* Uart, Unknown. */
#define UART_B_CMD		0x6f            /* Uart, Unknown. */
#define SAMPLE_RATE_TRACKER_STATUS 0x70         /* Readonly. Default 00108000 00108000 00500000 00500000 */
						/* Estimated sample rate [19:0] Relative to 48kHz. 0x8000 =  1.0
						 * Rate Locked [20]
						 * SPDIF Locked [21] For SPDIF channel only.
						 * Valid Audio [22] For SPDIF channel only.
						 */
#define CAPTURE_CONTROL         0x71            /* Some sort of routing. default = 40c81000 30303030 30300000 00700000 */
						/* Channel_id 0: 0x40c81000 must be changed to 0x40c80000 for SPDIF AC3 input or output. */
						/* Channel_id 1: 0xffffffff(mute) 0x30303030(max) controls CAPTURE feedback into PLAYBACK. */
						/* Sample rate output control register Channel=0
						 * Sample output rate [1:0] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
						 * Sample input rate [3:2] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
						 * SRC input source select [4] 0=Audio from digital mixer, 1=Audio from analog source.
						 * Record rate [9:8] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
						 * Record mixer output enable [12:10] 
						 * I2S input rate master mode [15:14] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
						 * I2S output rate [17:16] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
						 * I2S output source select [18] (0=Audio from host, 1=Audio from SRC)
						 * Record mixer I2S enable [20:19] (enable/disable i2sin1 and i2sin0)
						 * I2S output master clock select [21] (0=256*I2S output rate, 1=512*I2S output rate.)
						 * I2S input master clock select [22] (0=256*I2S input rate, 1=512*I2S input rate.)
						 * I2S input mode [23] (0=Slave, 1=Master)
						 * SPDIF output rate [25:24] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
						 * SPDIF output source select [26] (0=host, 1=SRC)
						 * Not used [27]
						 * Record Source 0 input [29:28] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
						 * Record Source 1 input [31:30] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
						 */ 
						/* Sample rate output control register Channel=1
						 * I2S Input 0 volume Right [7:0]
						 * I2S Input 0 volume Left [15:8]
						 * I2S Input 1 volume Right [23:16]
						 * I2S Input 1 volume Left [31:24]
						 */
						/* Sample rate output control register Channel=2
						 * SPDIF Input volume Right [23:16]
						 * SPDIF Input volume Left [31:24]
						 */
						/* Sample rate output control register Channel=3
						 * No used
						 */
#define SPDIF_SELECT2           0x72            /* Some sort of routing. Channel_id 0 only. default = 0x0f0f003f. Analog 0x000b0000, Digital 0x0b000000 */
#define ROUTING2_FRONT_MASK     0x00010000      /* Enable for Front speakers. */
#define ROUTING2_CENTER_LFE_MASK 0x00020000     /* Enable for Center/LFE speakers. */
#define ROUTING2_REAR_MASK      0x00080000      /* Enable for Rear speakers. */
						/* Audio output control
						 * AC97 output enable [5:0]
						 * I2S output enable [19:16]
						 * SPDIF output enable [27:24]
						 */ 
#define UNKNOWN73               0x73            /* Unknown. Readonly. Default 0x0 */
#define CHIP_VERSION            0x74            /* P17 Chip version. Channel_id 0 only. Default 00000071 */
#define EXTENDED_INT_MASK       0x75            /* Used by both playback and capture interrupt handler */
						/* Sets which Interrupts are enabled. */
						/* 0x00000001 = Half period. Playback.
						 * 0x00000010 = Full period. Playback.
						 * 0x00000100 = Half buffer. Playback.
						 * 0x00001000 = Full buffer. Playback.
						 * 0x00010000 = Half buffer. Capture.
						 * 0x00100000 = Full buffer. Capture.
						 * Capture can only do 2 periods.
						 * 0x01000000 = End audio. Playback.
						 * 0x40000000 = Half buffer Playback,Caputre xrun.
						 * 0x80000000 = Full buffer Playback,Caputre xrun.
						 */
#define EXTENDED_INT            0x76            /* Used by both playback and capture interrupt handler */
						/* Shows which interrupts are active at the moment. */
						/* Same bit layout as EXTENDED_INT_MASK */
#define COUNTER77               0x77		/* Counter range 0 to 0x3fffff, 192000 counts per second. */
#define COUNTER78               0x78		/* Counter range 0 to 0x3fffff, 44100 counts per second. */
#define EXTENDED_INT_TIMER      0x79            /* Channel_id 0 only. Used by both playback and capture interrupt handler */
						/* Causes interrupts based on timer intervals. */
#define SPI			0x7a		/* SPI: Serial Interface Register */
#define I2C_A			0x7b		/* I2C Address. 32 bit */
#define I2C_0			0x7c		/* I2C Data Port 0. 32 bit */
#define I2C_1			0x7d		/* I2C Data Port 1. 32 bit */


#define SET_CHANNEL 0  /* Testing channel outputs 0=Front, 1=Center/LFE, 2=Unknown, 3=Rear */
#define PCM_FRONT_CHANNEL 0
#define PCM_REAR_CHANNEL 1
#define PCM_CENTER_LFE_CHANNEL 2
#define PCM_UNKNOWN_CHANNEL 3
#define CONTROL_FRONT_CHANNEL 0
#define CONTROL_REAR_CHANNEL 3
#define CONTROL_CENTER_LFE_CHANNEL 1
#define CONTROL_UNKNOWN_CHANNEL 2

typedef struct snd_ca0106_channel ca0106_channel_t;
typedef struct snd_ca0106 ca0106_t;
typedef struct snd_ca0106_pcm ca0106_pcm_t;

struct snd_ca0106_channel {
	ca0106_t *emu;
	int number;
	int use;
	void (*interrupt)(ca0106_t *emu, ca0106_channel_t *channel);
	ca0106_pcm_t *epcm;
};

struct snd_ca0106_pcm {
	ca0106_t *emu;
	snd_pcm_substream_t *substream;
        int channel_id;
	unsigned short running;
};

// definition of the chip-specific record
struct snd_ca0106 {
	snd_card_t *card;
	struct pci_dev *pci;

	unsigned long port;
	struct resource *res_port;
	int irq;

	unsigned int revision;		/* chip revision */
	unsigned int serial;            /* serial number */
	unsigned short model;		/* subsystem id */

	spinlock_t emu_lock;

	ac97_t *ac97;
	snd_pcm_t *pcm;

	ca0106_channel_t playback_channels[4];
	ca0106_channel_t capture_channels[4];
	u32 spdif_bits[4];             /* s/pdif out setup */
	int spdif_enable;
	int capture_source;

	struct snd_dma_buffer buffer;
};

int __devinit snd_ca0106_mixer(ca0106_t *emu);
int __devinit snd_ca0106_proc_init(ca0106_t * emu);

unsigned int snd_ca0106_ptr_read(ca0106_t * emu, 
					  unsigned int reg, 
					  unsigned int chn);

void snd_ca0106_ptr_write(ca0106_t *emu, 
				   unsigned int reg, 
				   unsigned int chn, 
				   unsigned int data);