📄 mthca_provider.c
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case IB_QPT_UD: { qp = kmalloc(sizeof *qp, GFP_KERNEL); if (!qp) return ERR_PTR(-ENOMEM); qp->sq.max = init_attr->cap.max_send_wr; qp->rq.max = init_attr->cap.max_recv_wr; qp->sq.max_gs = init_attr->cap.max_send_sge; qp->rq.max_gs = init_attr->cap.max_recv_sge; err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd), to_mcq(init_attr->send_cq), to_mcq(init_attr->recv_cq), init_attr->qp_type, init_attr->sq_sig_type, init_attr->rq_sig_type, qp); qp->ibqp.qp_num = qp->qpn; break; } case IB_QPT_SMI: case IB_QPT_GSI: { qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL); if (!qp) return ERR_PTR(-ENOMEM); qp->sq.max = init_attr->cap.max_send_wr; qp->rq.max = init_attr->cap.max_recv_wr; qp->sq.max_gs = init_attr->cap.max_send_sge; qp->rq.max_gs = init_attr->cap.max_recv_sge; qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1; err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd), to_mcq(init_attr->send_cq), to_mcq(init_attr->recv_cq), init_attr->sq_sig_type, init_attr->rq_sig_type, qp->ibqp.qp_num, init_attr->port_num, to_msqp(qp)); break; } default: /* Don't support raw QPs */ return ERR_PTR(-ENOSYS); } if (err) { kfree(qp); return ERR_PTR(err); } init_attr->cap.max_inline_data = 0; return &qp->ibqp;}static int mthca_destroy_qp(struct ib_qp *qp){ mthca_free_qp(to_mdev(qp->device), to_mqp(qp)); kfree(qp); return 0;}static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries){ struct mthca_cq *cq; int nent; int err; cq = kmalloc(sizeof *cq, GFP_KERNEL); if (!cq) return ERR_PTR(-ENOMEM); for (nent = 1; nent <= entries; nent <<= 1) ; /* nothing */ err = mthca_init_cq(to_mdev(ibdev), nent, cq); if (err) { kfree(cq); cq = ERR_PTR(err); } else cq->ibcq.cqe = nent - 1; return &cq->ibcq;}static int mthca_destroy_cq(struct ib_cq *cq){ mthca_free_cq(to_mdev(cq->device), to_mcq(cq)); kfree(cq); return 0;}static int mthca_req_notify_cq(struct ib_cq *cq, enum ib_cq_notify notify){ mthca_arm_cq(to_mdev(cq->device), to_mcq(cq), notify == IB_CQ_SOLICITED); return 0;}static inline u32 convert_access(int acc){ return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) | (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) | (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) | (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) | MTHCA_MPT_FLAG_LOCAL_READ;}static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc){ struct mthca_mr *mr; int err; mr = kmalloc(sizeof *mr, GFP_KERNEL); if (!mr) return ERR_PTR(-ENOMEM); err = mthca_mr_alloc_notrans(to_mdev(pd->device), to_mpd(pd)->pd_num, convert_access(acc), mr); if (err) { kfree(mr); return ERR_PTR(err); } return &mr->ibmr;}static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd, struct ib_phys_buf *buffer_list, int num_phys_buf, int acc, u64 *iova_start){ struct mthca_mr *mr; u64 *page_list; u64 total_size; u64 mask; int shift; int npages; int err; int i, j, n; /* First check that we have enough alignment */ if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) return ERR_PTR(-EINVAL); if (num_phys_buf > 1 && ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) return ERR_PTR(-EINVAL); mask = 0; total_size = 0; for (i = 0; i < num_phys_buf; ++i) { if (buffer_list[i].addr & ~PAGE_MASK) return ERR_PTR(-EINVAL); if (i != 0 && i != num_phys_buf - 1 && (buffer_list[i].size & ~PAGE_MASK)) return ERR_PTR(-EINVAL); total_size += buffer_list[i].size; if (i > 0) mask |= buffer_list[i].addr; } /* Find largest page shift we can use to cover buffers */ for (shift = PAGE_SHIFT; shift < 31; ++shift) if (num_phys_buf > 1) { if ((1ULL << shift) & mask) break; } else { if (1ULL << shift >= buffer_list[0].size + (buffer_list[0].addr & ((1ULL << shift) - 1))) break; } buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1); buffer_list[0].addr &= ~0ull << shift; mr = kmalloc(sizeof *mr, GFP_KERNEL); if (!mr) return ERR_PTR(-ENOMEM); npages = 0; for (i = 0; i < num_phys_buf; ++i) npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift; if (!npages) return &mr->ibmr; page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL); if (!page_list) { kfree(mr); return ERR_PTR(-ENOMEM); } n = 0; for (i = 0; i < num_phys_buf; ++i) for (j = 0; j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift; ++j) page_list[n++] = buffer_list[i].addr + ((u64) j << shift); mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) " "in PD %x; shift %d, npages %d.\n", (unsigned long long) buffer_list[0].addr, (unsigned long long) *iova_start, to_mpd(pd)->pd_num, shift, npages); err = mthca_mr_alloc_phys(to_mdev(pd->device), to_mpd(pd)->pd_num, page_list, shift, npages, *iova_start, total_size, convert_access(acc), mr); if (err) { kfree(mr); return ERR_PTR(err); } kfree(page_list); return &mr->ibmr;}static int mthca_dereg_mr(struct ib_mr *mr){ mthca_free_mr(to_mdev(mr->device), to_mmr(mr)); kfree(mr); return 0;}static ssize_t show_rev(struct class_device *cdev, char *buf){ struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev); return sprintf(buf, "%x\n", dev->rev_id);}static ssize_t show_fw_ver(struct class_device *cdev, char *buf){ struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev); return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32), (int) (dev->fw_ver >> 16) & 0xffff, (int) dev->fw_ver & 0xffff);}static ssize_t show_hca(struct class_device *cdev, char *buf){ struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev); switch (dev->hca_type) { case TAVOR: return sprintf(buf, "MT23108\n"); case ARBEL_COMPAT: return sprintf(buf, "MT25208 (MT23108 compat mode)\n"); case ARBEL_NATIVE: return sprintf(buf, "MT25208\n"); default: return sprintf(buf, "unknown\n"); }}static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);static struct class_device_attribute *mthca_class_attributes[] = { &class_device_attr_hw_rev, &class_device_attr_fw_ver, &class_device_attr_hca_type};int mthca_register_device(struct mthca_dev *dev){ int ret; int i; strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX); dev->ib_dev.node_type = IB_NODE_CA; dev->ib_dev.phys_port_cnt = dev->limits.num_ports; dev->ib_dev.dma_device = &dev->pdev->dev; dev->ib_dev.class_dev.dev = &dev->pdev->dev; dev->ib_dev.query_device = mthca_query_device; dev->ib_dev.query_port = mthca_query_port; dev->ib_dev.modify_port = mthca_modify_port; dev->ib_dev.query_pkey = mthca_query_pkey; dev->ib_dev.query_gid = mthca_query_gid; dev->ib_dev.alloc_pd = mthca_alloc_pd; dev->ib_dev.dealloc_pd = mthca_dealloc_pd; dev->ib_dev.create_ah = mthca_ah_create; dev->ib_dev.destroy_ah = mthca_ah_destroy; dev->ib_dev.create_qp = mthca_create_qp; dev->ib_dev.modify_qp = mthca_modify_qp; dev->ib_dev.destroy_qp = mthca_destroy_qp; dev->ib_dev.post_send = mthca_post_send; dev->ib_dev.post_recv = mthca_post_receive; dev->ib_dev.create_cq = mthca_create_cq; dev->ib_dev.destroy_cq = mthca_destroy_cq; dev->ib_dev.poll_cq = mthca_poll_cq; dev->ib_dev.req_notify_cq = mthca_req_notify_cq; dev->ib_dev.get_dma_mr = mthca_get_dma_mr; dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr; dev->ib_dev.dereg_mr = mthca_dereg_mr; dev->ib_dev.attach_mcast = mthca_multicast_attach; dev->ib_dev.detach_mcast = mthca_multicast_detach; dev->ib_dev.process_mad = mthca_process_mad; init_MUTEX(&dev->cap_mask_mutex); ret = ib_register_device(&dev->ib_dev); if (ret) return ret; for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) { ret = class_device_create_file(&dev->ib_dev.class_dev, mthca_class_attributes[i]); if (ret) { ib_unregister_device(&dev->ib_dev); return ret; } } return 0;}void mthca_unregister_device(struct mthca_dev *dev){ ib_unregister_device(&dev->ib_dev);}
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