aic7xxx_reg.h_shipped

h内核

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scsiconf_print;
#else
#define ahc_scsiconf_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCSICONF", 0x5a, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_intdef_print;
#else
#define ahc_intdef_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "INTDEF", 0x5c, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_hostconf_print;
#else
#define ahc_hostconf_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "HOSTCONF", 0x5d, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_ha_274_biosctrl_print;
#else
#define ahc_ha_274_biosctrl_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "HA_274_BIOSCTRL", 0x5f, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_seqctl_print;
#else
#define ahc_seqctl_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SEQCTL", 0x60, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_seqram_print;
#else
#define ahc_seqram_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SEQRAM", 0x61, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_seqaddr0_print;
#else
#define ahc_seqaddr0_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SEQADDR0", 0x62, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_seqaddr1_print;
#else
#define ahc_seqaddr1_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SEQADDR1", 0x63, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_accum_print;
#else
#define ahc_accum_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "ACCUM", 0x64, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_sindex_print;
#else
#define ahc_sindex_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SINDEX", 0x65, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dindex_print;
#else
#define ahc_dindex_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DINDEX", 0x66, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_allones_print;
#else
#define ahc_allones_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "ALLONES", 0x69, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_allzeros_print;
#else
#define ahc_allzeros_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "ALLZEROS", 0x6a, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_none_print;
#else
#define ahc_none_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "NONE", 0x6a, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_flags_print;
#else
#define ahc_flags_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "FLAGS", 0x6b, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_sindir_print;
#else
#define ahc_sindir_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SINDIR", 0x6c, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dindir_print;
#else
#define ahc_dindir_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DINDIR", 0x6d, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_function1_print;
#else
#define ahc_function1_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "FUNCTION1", 0x6e, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_stack_print;
#else
#define ahc_stack_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "STACK", 0x6f, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_targ_offset_print;
#else
#define ahc_targ_offset_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "TARG_OFFSET", 0x70, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_sram_base_print;
#else
#define ahc_sram_base_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SRAM_BASE", 0x70, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_bctl_print;
#else
#define ahc_bctl_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "BCTL", 0x84, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dscommand0_print;
#else
#define ahc_dscommand0_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DSCOMMAND0", 0x84, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_bustime_print;
#else
#define ahc_bustime_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "BUSTIME", 0x85, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dscommand1_print;
#else
#define ahc_dscommand1_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DSCOMMAND1", 0x85, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_busspd_print;
#else
#define ahc_busspd_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "BUSSPD", 0x86, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_hs_mailbox_print;
#else
#define ahc_hs_mailbox_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "HS_MAILBOX", 0x86, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dspcistatus_print;
#else
#define ahc_dspcistatus_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DSPCISTATUS", 0x86, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_hcntrl_print;
#else
#define ahc_hcntrl_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "HCNTRL", 0x87, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_haddr_print;
#else
#define ahc_haddr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "HADDR", 0x88, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_hcnt_print;
#else
#define ahc_hcnt_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "HCNT", 0x8c, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scbptr_print;
#else
#define ahc_scbptr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCBPTR", 0x90, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_intstat_print;
#else
#define ahc_intstat_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "INTSTAT", 0x91, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_clrint_print;
#else
#define ahc_clrint_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "CLRINT", 0x92, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_error_print;
#else
#define ahc_error_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "ERROR", 0x92, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dfcntrl_print;
#else
#define ahc_dfcntrl_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DFCNTRL", 0x93, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dfstatus_print;
#else
#define ahc_dfstatus_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DFSTATUS", 0x94, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dfwaddr_print;
#else
#define ahc_dfwaddr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DFWADDR", 0x95, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dfraddr_print;
#else
#define ahc_dfraddr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DFRADDR", 0x97, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_dfdat_print;
#else
#define ahc_dfdat_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "DFDAT", 0x99, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scbcnt_print;
#else
#define ahc_scbcnt_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCBCNT", 0x9a, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_qinfifo_print;
#else
#define ahc_qinfifo_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "QINFIFO", 0x9b, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_qincnt_print;
#else
#define ahc_qincnt_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "QINCNT", 0x9c, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_qoutfifo_print;
#else
#define ahc_qoutfifo_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "QOUTFIFO", 0x9d, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_crccontrol1_print;
#else
#define ahc_crccontrol1_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "CRCCONTROL1", 0x9d, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_qoutcnt_print;
#else
#define ahc_qoutcnt_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "QOUTCNT", 0x9e, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scsiphase_print;
#else
#define ahc_scsiphase_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCSIPHASE", 0x9e, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_sfunct_print;
#else
#define ahc_sfunct_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SFUNCT", 0x9f, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_base_print;
#else
#define ahc_scb_base_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_BASE", 0xa0, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_cdb_ptr_print;
#else
#define ahc_scb_cdb_ptr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_CDB_PTR", 0xa0, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_residual_sgptr_print;
#else
#define ahc_scb_residual_sgptr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_RESIDUAL_SGPTR", 0xa4, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_scsi_status_print;
#else
#define ahc_scb_scsi_status_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_SCSI_STATUS", 0xa8, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_target_phases_print;
#else
#define ahc_scb_target_phases_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_TARGET_PHASES", 0xa9, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_target_data_dir_print;
#else
#define ahc_scb_target_data_dir_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_TARGET_DATA_DIR", 0xaa, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_target_itag_print;
#else
#define ahc_scb_target_itag_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_TARGET_ITAG", 0xab, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_dataptr_print;
#else
#define ahc_scb_dataptr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_DATAPTR", 0xac, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_datacnt_print;
#else
#define ahc_scb_datacnt_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_DATACNT", 0xb0, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_sgptr_print;
#else
#define ahc_scb_sgptr_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_SGPTR", 0xb4, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_control_print;
#else
#define ahc_scb_control_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_CONTROL", 0xb8, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_scsiid_print;
#else
#define ahc_scb_scsiid_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_SCSIID", 0xb9, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_lun_print;
#else
#define ahc_scb_lun_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_LUN", 0xba, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_tag_print;
#else
#define ahc_scb_tag_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_TAG", 0xbb, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_cdb_len_print;
#else
#define ahc_scb_cdb_len_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_CDB_LEN", 0xbc, regvalue, cur_col, wrap)
#endif

#if AIC_DEBUG_REGISTERS
ahc_reg_print_t ahc_scb_scsirate_print;
#else
#define ahc_scb_scsirate_print(regvalue, cur_col, wrap) \
    ahc_print_register(NULL, 0, "SCB_SCSIRATE", 0xbd, regvalue, cur_col, wrap)