📄 i8042.c
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if (mux_version == 0xAC) return -1; printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n", (mux_version >> 4) & 0xf, mux_version & 0xf); if (i8042_enable_mux_ports(values)) return -1; i8042_mux_present = 1; return 0;}/* * i8042_check_aux() applies as much paranoia as it can at detecting * the presence of an AUX interface. */static int __init i8042_check_aux(struct i8042_values *values){ unsigned char param; static int i8042_check_aux_cookie;/* * Check if AUX irq is available. If it isn't, then there is no point * in trying to detect AUX presence. */ if (request_irq(values->irq, i8042_interrupt, SA_SHIRQ, "i8042", &i8042_check_aux_cookie)) return -1; free_irq(values->irq, &i8042_check_aux_cookie);/* * Get rid of bytes in the queue. */ i8042_flush();/* * Internal loopback test - filters out AT-type i8042's. Unfortunately * SiS screwed up and their 5597 doesn't support the LOOP command even * though it has an AUX port. */ param = 0x5a; if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != 0xa5) {/* * External connection test - filters out AT-soldered PS/2 i8042's * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error * 0xfa - no error on some notebooks which ignore the spec * Because it's common for chipsets to return error on perfectly functioning * AUX ports, we test for this only when the LOOP command failed. */ if (i8042_command(¶m, I8042_CMD_AUX_TEST) || (param && param != 0xfa && param != 0xff)) return -1; }/* * Bit assignment test - filters out PS/2 i8042's in AT mode */ if (i8042_command(¶m, I8042_CMD_AUX_DISABLE)) return -1; if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (~param & I8042_CTR_AUXDIS)) { printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n"); } if (i8042_command(¶m, I8042_CMD_AUX_ENABLE)) return -1; if (i8042_command(¶m, I8042_CMD_CTL_RCTR) || (param & I8042_CTR_AUXDIS)) return -1;/* * Disable the interface. */ i8042_ctr |= I8042_CTR_AUXDIS; i8042_ctr &= ~I8042_CTR_AUXINT; if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) return -1; return 0;}/* * i8042_port_register() marks the device as existing, * registers it, and reports to the user. */static int __init i8042_port_register(struct serio *port){ struct i8042_values *values = port->port_data; values->exists = 1; i8042_ctr &= ~values->disable; if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { printk(KERN_WARNING "i8042.c: Can't write CTR while registering.\n"); values->exists = 0; return -1; } printk(KERN_INFO "serio: i8042 %s port at %#lx,%#lx irq %d\n", values->name, (unsigned long) I8042_DATA_REG, (unsigned long) I8042_COMMAND_REG, values->irq); serio_register_port(port); return 0;}static void i8042_timer_func(unsigned long data){ i8042_interrupt(0, NULL, NULL);}/* * i8042_controller init initializes the i8042 controller, and, * most importantly, sets it into non-xlated mode if that's * desired. */static int i8042_controller_init(void){ unsigned long flags;/* * Test the i8042. We need to know if it thinks it's working correctly * before doing anything else. */ i8042_flush(); if (i8042_reset) { unsigned char param; if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n"); return -1; } if (param != I8042_RET_CTL_TEST) { printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n", param, I8042_RET_CTL_TEST); return -1; } }/* * Save the CTR for restoral on unload / reboot. */ if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); return -1; } i8042_initial_ctr = i8042_ctr;/* * Disable the keyboard interface and interrupt. */ i8042_ctr |= I8042_CTR_KBDDIS; i8042_ctr &= ~I8042_CTR_KBDINT;/* * Handle keylock. */ spin_lock_irqsave(&i8042_lock, flags); if (~i8042_read_status() & I8042_STR_KEYLOCK) { if (i8042_unlock) i8042_ctr |= I8042_CTR_IGNKEYLOCK; else printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n"); } spin_unlock_irqrestore(&i8042_lock, flags);/* * If the chip is configured into nontranslated mode by the BIOS, don't * bother enabling translating and be happy. */ if (~i8042_ctr & I8042_CTR_XLATE) i8042_direct = 1;/* * Set nontranslated mode for the kbd interface if requested by an option. * After this the kbd interface becomes a simple serial in/out, like the aux * interface is. We don't do this by default, since it can confuse notebook * BIOSes. */ if (i8042_direct) i8042_ctr &= ~I8042_CTR_XLATE;/* * Write CTR back. */ if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n"); return -1; } return 0;}/* * Reset the controller. */void i8042_controller_reset(void){ unsigned char param;/* * Reset the controller if requested. */ if (i8042_reset) if (i8042_command(¶m, I8042_CMD_CTL_TEST)) printk(KERN_ERR "i8042.c: i8042 controller reset timeout.\n");/* * Disable MUX mode if present. */ if (i8042_mux_present) i8042_set_mux_mode(0, NULL);/* * Restore the original control register setting. */ i8042_ctr = i8042_initial_ctr; if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");}/* * Here we try to reset everything back to a state in which the BIOS will be * able to talk to the hardware when rebooting. */void i8042_controller_cleanup(void){ int i; i8042_flush();/* * Reset anything that is connected to the ports. */ if (i8042_kbd_values.exists) serio_cleanup(i8042_kbd_port); if (i8042_aux_values.exists) serio_cleanup(i8042_aux_port); for (i = 0; i < I8042_NUM_MUX_PORTS; i++) if (i8042_mux_values[i].exists) serio_cleanup(i8042_mux_port[i]); i8042_controller_reset();}static int blink_frequency = 500;module_param_named(panicblink, blink_frequency, int, 0600);/* Catch the case when the kbd interrupt is off */#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)/* Tell the user who may be running in X and not see the console that we have panic'ed. This is to distingush panics from "real" lockups. */static long i8042_panic_blink(long count){ long delay = 0; static long last_blink; static char led; /* Roughly 1/2s frequency. KDB uses about 1s. Make sure it is different. */ if (!blink_frequency) return 0; if (count - last_blink < blink_frequency) return 0; led ^= 0x01 | 0x04; while (i8042_read_status() & I8042_STR_IBF) DELAY; i8042_write_data(0xed); /* set leds */ DELAY; while (i8042_read_status() & I8042_STR_IBF) DELAY; DELAY; i8042_write_data(led); DELAY; last_blink = count; return delay;}#undef DELAY/* * Here we try to restore the original BIOS settings */static int i8042_suspend(struct device *dev, u32 state, u32 level){ if (level == SUSPEND_DISABLE) { del_timer_sync(&i8042_timer); i8042_controller_reset(); } return 0;}/* * Here we try to reset everything back to a state in which suspended */static int i8042_resume(struct device *dev, u32 level){ int i; if (level != RESUME_ENABLE) return 0; if (i8042_controller_init()) { printk(KERN_ERR "i8042: resume failed\n"); return -1; } if (i8042_mux_present) if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports(&i8042_aux_values)) { printk(KERN_WARNING "i8042: failed to resume active multiplexor, mouse won't work.\n"); }/* * Reconnect anything that was connected to the ports. */ if (i8042_kbd_values.exists && i8042_activate_port(i8042_kbd_port) == 0) serio_reconnect(i8042_kbd_port); if (i8042_aux_values.exists && i8042_activate_port(i8042_aux_port) == 0) serio_reconnect(i8042_aux_port); for (i = 0; i < I8042_NUM_MUX_PORTS; i++) if (i8042_mux_values[i].exists && i8042_activate_port(i8042_mux_port[i]) == 0) serio_reconnect(i8042_mux_port[i]);/* * Restart timer (for polling "stuck" data) */ mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD); panic_blink = i8042_panic_blink; return 0;}/* * We need to reset the 8042 back to original mode on system shutdown, * because otherwise BIOSes will be confused. */static void i8042_shutdown(struct device *dev){ i8042_controller_cleanup();}static struct device_driver i8042_driver = { .name = "i8042", .bus = &platform_bus_type, .suspend = i8042_suspend, .resume = i8042_resume, .shutdown = i8042_shutdown,};static struct serio * __init i8042_allocate_kbd_port(void){ struct serio *serio; serio = kmalloc(sizeof(struct serio), GFP_KERNEL); if (serio) { memset(serio, 0, sizeof(struct serio)); serio->type = i8042_direct ? SERIO_8042 : SERIO_8042_XL, serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write, serio->open = i8042_open, serio->close = i8042_close, serio->port_data = &i8042_kbd_values, serio->dev.parent = &i8042_platform_device->dev; strlcpy(serio->name, "i8042 Kbd Port", sizeof(serio->name)); strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); } return serio;}static struct serio * __init i8042_allocate_aux_port(void){ struct serio *serio; serio = kmalloc(sizeof(struct serio), GFP_KERNEL); if (serio) { memset(serio, 0, sizeof(struct serio)); serio->type = SERIO_8042; serio->write = i8042_aux_write; serio->open = i8042_open; serio->close = i8042_close; serio->port_data = &i8042_aux_values, serio->dev.parent = &i8042_platform_device->dev; strlcpy(serio->name, "i8042 Aux Port", sizeof(serio->name)); strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); } return serio;}static struct serio * __init i8042_allocate_mux_port(int index){ struct serio *serio; struct i8042_values *values = &i8042_mux_values[index]; serio = kmalloc(sizeof(struct serio), GFP_KERNEL); if (serio) { *values = i8042_aux_values; snprintf(values->name, sizeof(values->name), "AUX%d", index); values->mux = index; memset(serio, 0, sizeof(struct serio)); serio->type = SERIO_8042; serio->write = i8042_aux_write; serio->open = i8042_open; serio->close = i8042_close; serio->port_data = values; serio->dev.parent = &i8042_platform_device->dev; snprintf(serio->name, sizeof(serio->name), "i8042 Aux-%d Port", index); snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, index + 1); } return serio;}int __init i8042_init(void){ int i; int err; dbg_init(); init_timer(&i8042_timer); i8042_timer.function = i8042_timer_func; if (i8042_platform_init()) return -EBUSY; i8042_aux_values.irq = I8042_AUX_IRQ; i8042_kbd_values.irq = I8042_KBD_IRQ; if (i8042_controller_init()) return -ENODEV; err = driver_register(&i8042_driver); if (err) return err; i8042_platform_device = platform_device_register_simple("i8042", -1, NULL, 0); if (IS_ERR(i8042_platform_device)) { driver_unregister(&i8042_driver); return PTR_ERR(i8042_platform_device); } if (!i8042_noaux && !i8042_check_aux(&i8042_aux_values)) { if (!i8042_nomux && !i8042_check_mux(&i8042_aux_values)) for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { i8042_mux_port[i] = i8042_allocate_mux_port(i); if (i8042_mux_port[i]) i8042_port_register(i8042_mux_port[i]); } else { i8042_aux_port = i8042_allocate_aux_port(); if (i8042_aux_port) i8042_port_register(i8042_aux_port); } } i8042_kbd_port = i8042_allocate_kbd_port(); if (i8042_kbd_port) i8042_port_register(i8042_kbd_port); mod_timer(&i8042_timer, jiffies + I8042_POLL_PERIOD); return 0;}void __exit i8042_exit(void){ int i; i8042_controller_cleanup(); if (i8042_kbd_values.exists) serio_unregister_port(i8042_kbd_port); if (i8042_aux_values.exists) serio_unregister_port(i8042_aux_port); for (i = 0; i < I8042_NUM_MUX_PORTS; i++) if (i8042_mux_values[i].exists) serio_unregister_port(i8042_mux_port[i]); del_timer_sync(&i8042_timer); platform_device_unregister(i8042_platform_device); driver_unregister(&i8042_driver); i8042_platform_exit(); panic_blink = NULL;}module_init(i8042_init);module_exit(i8042_exit);
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