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📄 graduation.rpt

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Name                Pt      Pt    Pt  Pt               #    Type    Use
state<9>              2       0     0   3     FB3_1   39    I/O     (b)
fsk                   2       0     0   3     FB3_2   32    GCK/I/O O
state<8>              2       0     0   3     FB3_3   41    I/O     (b)
state<7>              2       0     0   3     FB3_4   44    I/O     (b)
state<6>              2       0     0   3     FB3_5   33    I/O     (b)
state<5>              2       0     0   3     FB3_6   34    I/O     (b)
state<4>              2       0     0   3     FB3_7   46    I/O     (b)
state<3>              2       0     0   3     FB3_8   38    GCK/I/O (b)
state<19>             2       0     0   3     FB3_9   40    I/O     (b)
state<18>             2       0     0   3     FB3_10  48    I/O     (b)
state<17>             2       0     0   3     FB3_11  43    I/O     (b)
state<16>             2       0     0   3     FB3_12  45    I/O     (b)
state<15>             2       0     0   3     FB3_13        (b)     (b)
state<14>             2       0     0   3     FB3_14  49    I/O     (b)
state<13>             2       0     0   3     FB3_15  50    I/O     (b)
state<12>             2       0     0   3     FB3_16        (b)     (b)
state<11>             2       0     0   3     FB3_17  51    I/O     (b)
state<10>             2       0     0   3     FB3_18        (b)     (b)

Signals Used by Logic in Function Block
  1: clk                8: state<14>         15: state<3> 
  2: div<11>            9: state<15>         16: state<4> 
  3: state<0>          10: state<16>         17: state<5> 
  4: state<10>         11: state<17>         18: state<6> 
  5: state<11>         12: state<18>         19: state<7> 
  6: state<12>         13: state<1>          20: state<8> 
  7: state<13>         14: state<2>          21: state<9> 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
state<9>             X.X.........XXXXXXXX.................... 10
fsk                  XX...................................... 2
state<8>             X.X.........XXXXXXX..................... 9
state<7>             X.X.........XXXXXX...................... 8
state<6>             X.X.........XXXXX....................... 7
state<5>             X.X.........XXXX........................ 6
state<4>             X.X.........XXX......................... 5
state<3>             X.X.........XX.......................... 4
state<19>            X.XXXXXXXXXXXXXXXXXXX................... 20
state<18>            X.XXXXXXXXX.XXXXXXXXX................... 19
state<17>            X.XXXXXXXX..XXXXXXXXX................... 18
state<16>            X.XXXXXXX...XXXXXXXXX................... 17
state<15>            X.XXXXXX....XXXXXXXXX................... 16
state<14>            X.XXXXX.....XXXXXXXXX................... 15
state<13>            X.XXXX......XXXXXXXXX................... 14
state<12>            X.XXX.......XXXXXXXXX................... 13
state<11>            X.XX........XXXXXXXXX................... 12
state<10>            X.X.........XXXXXXXXX................... 11
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB4  ***********************************
Number of function block inputs used/remaining:               15/39
Number of signals used by logic mapping into function block:  15
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
count<0>              2       0   \/3   0     FB4_1   118   I/O     (b)
(unused)              0       0   \/5   0     FB4_2   126   I/O     (b)
data_tmp<6>          25      20<-   0   0     FB4_3   133   I/O     (b)
(unused)              0       0   /\5   0     FB4_4         (b)     (b)
(unused)              0       0   /\5   0     FB4_5   128   I/O     I
count<5>              3       0   /\2   0     FB4_6   129   I/O     (b)
count<3>              3       0   \/2   0     FB4_7         (b)     (b)
(unused)              0       0   \/5   0     FB4_8   130   I/O     (b)
(unused)              0       0   \/5   0     FB4_9   131   I/O     (b)
data_tmp<0>          25      20<-   0   0     FB4_10  135   I/O     (b)
(unused)              0       0   /\5   0     FB4_11  132   I/O     (b)
count<4>              2       0   /\3   0     FB4_12  134   I/O     (b)
count<2>              2       0   \/3   0     FB4_13  137   I/O     (b)
(unused)              0       0   \/5   0     FB4_14  136   I/O     (b)
(unused)              0       0   \/5   0     FB4_15  138   I/O     (b)
data_tmp<4>          26      21<-   0   0     FB4_16  139   I/O     (b)
(unused)              0       0   /\5   0     FB4_17  140   I/O     (b)
$OpTx$FX_DC$36        2       0   /\3   0     FB4_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$FX_DC$36     6: count<3>          11: data_tmp<6> 
  2: clk                7: count<4>          12: dial<0> 
  3: count<0>           8: count<5>          13: dial<1> 
  4: count<1>           9: data_tmp<0>       14: dial<2> 
  5: count<2>          10: data_tmp<4>       15: output2<7> 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
count<0>             .XXXXXXX................................ 7
data_tmp<6>          XXXXXXXX..XXXXX......................... 13
count<5>             .XXXXXXX................................ 7
count<3>             .XXXXXXX................................ 7
data_tmp<0>          .XXXXXXXX..XXXX......................... 12
count<4>             .XXXXX.................................. 5
count<2>             .XXX.................................... 3
data_tmp<4>          .XXXXXXX.X.XXXX......................... 12
$OpTx$FX_DC$36       ............XX.......................... 2
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB5  ***********************************
Number of function block inputs used/remaining:               24/30
Number of signals used by logic mapping into function block:  24
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
data_tmp<2>          23      18<-   0   0     FB5_1         (b)     (b)
(unused)              0       0   /\5   0     FB5_2   52    I/O     (b)
div<9>                2       0   /\3   0     FB5_3   59    I/O     (b)
count<1>              2       0   \/3   0     FB5_4         (b)     (b)
(unused)              0       0   \/5   0     FB5_5   53    I/O     (b)
data_tmp<5>          18      13<-   0   0     FB5_6   54    I/O     (b)
(unused)              0       0   /\5   0     FB5_7   66    I/O     I
(unused)              0       0   \/5   0     FB5_8   56    I/O     (b)
(unused)              0       0   \/5   0     FB5_9   57    I/O     (b)
data_tmp<7>          20      15<-   0   0     FB5_10  68    I/O     (b)
(unused)              0       0   /\5   0     FB5_11  58    I/O     (b)
(unused)              0       0   \/2   3     FB5_12  60    I/O     (b)
(unused)              0       0   \/5   0     FB5_13  70    I/O     (b)
data_tmp<1>          22      17<-   0   0     FB5_14  61    I/O     (b)
(unused)              0       0   /\5   0     FB5_15  64    I/O     I
(unused)              0       0   /\5   0     FB5_16        (b)     (b)
(unused)              0       0   \/5   0     FB5_17  69    I/O     I
(unused)              0       0   \/5   0     FB5_18        (b)     (b)

Signals Used by Logic in Function Block
  1: clk                9: data_tmp<2>       17: div<2> 
  2: count<0>          10: data_tmp<5>       18: div<3> 
  3: count<1>          11: data_tmp<7>       19: div<4> 
  4: count<2>          12: dial<0>           20: div<5> 
  5: count<3>          13: dial<1>           21: div<6> 
  6: count<4>          14: dial<2>           22: div<7> 
  7: count<5>          15: div<0>            23: div<8> 
  8: data_tmp<1>       16: div<1>            24: output2<7> 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
data_tmp<2>          XXXXXXX.X..XXX.........X................ 12
div<9>               X.............XXXXXXXXX................. 10
count<1>             XX...................................... 2
data_tmp<5>          XXXXXXX..X.XXX.........X................ 12
data_tmp<7>          XXXXXXX...XXXX.........X................ 12
data_tmp<1>          XXXXXXXX...XXX.........X................ 12
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB6  ***********************************
Number of function block inputs used/remaining:               23/31
Number of signals used by logic mapping into function block:  23
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
div<8>                2       0   /\1   2     FB6_1         (b)     (b)
div<7>                2       0     0   3     FB6_2   106   I/O     (b)
div<6>                2       0     0   3     FB6_3         (b)     (b)
div<5>                2       0     0   3     FB6_4   111   I/O     (b)
div<4>                2       0     0   3     FB6_5   110   I/O     (b)
div<3>                2       0     0   3     FB6_6   112   I/O     (b)
div<2>                2       0     0   3     FB6_7         (b)     (b)
div<1>                2       0   \/3   0     FB6_8   113   I/O     (b)
(unused)              0       0   \/5   0     FB6_9   116   I/O     (b)
(unused)              0       0   \/5   0     FB6_10  115   I/O     (b)
address_tmp<0>       26      21<-   0   0     FB6_11  119   I/O     (b)
(unused)              0       0   /\5   0     FB6_12  120   I/O     (b)
div<11>               2       0   /\3   0     FB6_13        (b)     (b)
div<10>               2       0   \/3   0     FB6_14  121   I/O     (b)
(unused)              0       0   \/5   0     FB6_15  124   I/O     (b)
address_tmp<1>       24      19<-   0   0     FB6_16  117   I/O     (b)
(unused)              0       0   /\5   0     FB6_17  125   I/O     (b)
(unused)              0       0   /\5   0     FB6_18        (b)     (b)

Signals Used by Logic in Function Block
  1: address_tmp<0>     9: count<5>          17: div<3> 
  2: address_tmp<1>    10: dial<0>           18: div<4> 
  3: clk               11: dial<1>           19: div<5> 
  4: count<0>          12: dial<2>           20: div<6> 
  5: count<1>          13: div<0>            21: div<7> 
  6: count<2>          14: div<10>           22: div<8> 
  7: count<3>          15: div<1>            23: div<9> 
  8: count<4>          16: div<2>           

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
div<8>               ..X.........X.XXXXXXX................... 9
div<7>               ..X.........X.XXXXXX.................... 8
div<6>               ..X.........X.XXXXX..................... 7
div<5>               ..X.........X.XXXX...................... 6
div<4>               ..X.........X.XXX....................... 5
div<3>               ..X.........X.XX........................ 4
div<2>               ..X.........X.X......................... 3
div<1>               ..X.........X........................... 2
address_tmp<0>       X.XXXXXXXXXX............................ 11
div<11>              ..X.........XXXXXXXXXXX................. 12
div<10>              ..X.........X.XXXXXXXXX................. 11
address_tmp<1>       .XXXXXXXXXXX............................ 11
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB7  ***********************************
Number of function block inputs used/remaining:               15/39
Number of signals used by logic mapping into function block:  15
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   /\5   0     FB7_1         (b)     (b)
(unused)              0       0   /\1   4     FB7_2   71    I/O     (b)
(unused)              0       0     0   5     FB7_3   75    I/O     
output2<7>            2       0     0   3     FB7_4         (b)     (b)
state<1>              2       0     0   3     FB7_5   74    I/O     (b)
state<2>              2       0     0   3     FB7_6   76    I/O     (b)
div<0>                1       0     0   4     FB7_7   77    I/O     (b)
dount<3>              1       0     0   4     FB7_8   78    I/O     (b)
dount<4>              1       0     0   4     FB7_9   80    I/O     (b)
dount<5>              1       0     0   4     FB7_10  79    I/O     (b)
state<0>              1       0     0   4     FB7_11  82    I/O     (b)
(unused)              0       0   \/2   3     FB7_12  85    I/O     (b)
(unused)              0       0   \/5   0     FB7_13  81    I/O     (b)
address_tmp<5>       17      12<-   0   0     FB7_14  86    I/O     (b)
(unused)              0       0   /\5   0     FB7_15  87    I/O     (b)
(unused)              0       0   \/5   0     FB7_16  83    I/O     (b)
(unused)              0       0   \/5   0     FB7_17  88    I/O     (b)
address_tmp<2>       21      16<-   0   0     FB7_18        (b)     (b)

Signals Used by Logic in Function Block
  1: address_tmp<2>     6: count<2>          11: dial<1> 
  2: address_tmp<5>     7: count<3>          12: dial<2> 
  3: clk                8: count<4>          13: state<0> 
  4: count<0>           9: count<5>          14: state<19> 
  5: count<1>          10: dial<0>           15: state<1> 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
output2<7>           ..X..........X.......................... 2
state<1>             ..X.........X........................... 2
state<2>             ..X.........X.X......................... 3
div<0>               ..X..................................... 1
dount<3>             ..X..................................... 1
dount<4>             ..X..................................... 1
dount<5>             ..X..................................... 1
state<0>             ..X..................................... 1
address_tmp<5>       .XXXXXXXXXXX............................ 11
address_tmp<2>       X.XXXXXXXXXX............................ 11
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB8  ***********************************
Number of function block inputs used/remaining:               0/54
Number of signals used by logic mapping into function block:  0
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB8_1         (b)     
(unused)              0       0     0   5     FB8_2   91    I/O     
(unused)              0       0     0   5     FB8_3   95    I/O     
(unused)              0       0     0   5     FB8_4   97    I/O     
(unused)              0       0     0   5     FB8_5   92    I/O     
(unused)              0       0     0   5     FB8_6   93    I/O     
(unused)              0       0     0   5     FB8_7         (b)     
(unused)              0       0     0   5     FB8_8   94    I/O     
(unused)              0       0     0   5     FB8_9   96    I/O     
(unused)              0       0     0   5     FB8_10  101   I/O     
(unused)              0       0     0   5     FB8_11  98    I/O     
(unused)              0       0     0   5     FB8_12  100   I/O     
(unused)              0       0     0   5     FB8_13  103   I/O     
(unused)              0       0     0   5     FB8_14  102   I/O     
(unused)              0       0     0   5     FB8_15  104   I/O     
(unused)              0       0     0   5     FB8_16  107   I/O     
(unused)              0       0     0   5     FB8_17  105   I/O     
(unused)              0       0     0   5     FB8_18        (b)     
*******************************  Equations  ********************************

********** Mapped Logic **********


$OpTx$FX_DC$36 <= dial(2)
	 XOR 
$OpTx$FX_DC$36 <= dial(1);







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