hc_comm.h

来自「使用ISP1362芯片的USB_OTG参考设计源代码比较新的版本」· C头文件 代码 · 共 115 行

/*
**  WASABI-Hot! version 1.2c   
**
**      ** ISP1362 version of "Kenobi2" (Kenobi2 is a code for ISP1362)    **
**
**      -- copyright (c) 2001-2004 by Philips Japan, Ltd. -- All rights reserved --
**
**
**      ** This code has been made to check/learn                          ** 
**      **                             the ISP1362/ISP1363 functionalities **
**      ** Release 06-Aug-2004                                             **
**
**      OKANO, Akifumi
**      
**		Application Laboratory, Mobile and Connectivity
**      Semiconductors Div, Philips Japan Ltd.
**      [e-mail]
**      [phone] 
*/


/****************************************************************************/
/*	constants																*/
/****************************************************************************/


/*  1362 registers  */

/*
**	1362 Hc register access commands
**	
**		Each name is given in this rule
**
**		  ComBB_XXXXX
**        ^^^          <----- "Com" : Name for RegisterCommands
**           ^^        <----- BB    : Register accessing data width
**              ^^^^^^ <----- XXXXX : Register name defined in datasheet
*/
			//	OHCI - HC control and status registers

#define		Com32_HcRevision					0x00
#define		Com32_HcControl						0x01
#define		Com32_HcCommandStatus				0x02
#define		Com32_HcInterruptStatus				0x03
#define		Com32_HcInterruptEnable				0x04
#define		Com32_HcInterruptDisable			0x05

			//	OHCI - HC frame counter registers

#define		Com32_HcFmInterval					0x0D
#define		Com32_HcFmRemaining					0x0E
#define		Com32_HcFmNumber					0x0F
#define		Com32_HcLSThreshold					0x11

			//	OHCI - HC root hub registers

#define		Com32_HcRhDescriptorA				0x12
#define		Com32_HcRhDescriptorB				0x13
#define		Com32_HcRhStatus					0x14
#define		Com32_HcRhPortStatus1				0x15
#define		Com32_HcRhPortStatus2				0x16

			//	1362/1362 - HC DMA and Interrupt control registers

#define		Com16_HcHardwareConfiguration		0x20
#define		Com16_HcDMAConfiguration			0x21
#define		Com16_HcTransferCounter				0x22
#define		Com16_HcuPInterrupt					0x24
#define		Com16_HcuPInterruptEnable			0x25

			//	1362/1362 - HC Miscellaneous registers

#define		Com16_HcChipID						0x27
#define		Com16_HcScratch						0x28
#define		Com16_HcSoftwareReset				0xA9

			//	1362 - HC Buffer RAM control registers

#define		Com16_HcBufferStatus				0x2C
#define		Com32_HcDirectAddressLength			0x32
#define		Com16_HcDirectAddressData			0x45

			//	1362 - ISO transfer registers

#define		Com16_HcISTLBufferSize				0x30
#define		Com16_HcISTL0BufferPort				0x40
#define		Com16_HcISTL1BufferPort				0x42
#define		Com16_HcISTLToggleRate				0x47

			//	1362 - Interrupt transfer registers
			
#define		Com16_HcINTLBufferSize				0x33
#define		Com16_HcINTLBufferPort				0x43
#define		Com16_HcINTLBlkSize					0x53
#define		Com32_HcINTLPTDDoneMap				0x17
#define		Com32_HcINTLPTDSkipMap				0x18
#define		Com32_HcINTLLastPTD					0x19
#define		Com16_HcINTLCurrentActiePTD			0x1A

			//	1362 - Aperiodic transfer registers

			
#define		Com16_HcATLBufferSize				0x34
#define		Com16_HcATLBufferPort				0x44
#define		Com16_HcATLBlkSize					0x54
#define		Com32_HcATLPTDDoneMap				0x1B
#define		Com32_HcATLPTDSkipMap				0x1C
#define		Com32_HcATLLastPTD					0x1D
#define		Com16_HcATLCurrentActiePTD			0x1E
#define		Com16_HcATLPTDDoneThresholdCount	0x51
#define		Com16_HcATLPTDDoneThresholdTimeOut	0x52

#define		PTD_HEADER_SIZE						8