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PROGRAM "C:\Documents and Settings\Administrator\桌面\E2读写操作\E2读写操作\bin\Project.abs"
*********************************************************************************************
TARGET SECTION
---------------------------------------------------------------------------------------------
Processor : Freescale HC08
Memory Model: SMALL
File Format : ELF\DWARF 2.0
Linker : SmartLinker V-5.0.29 Build 6124, May 5 2006
*********************************************************************************************
FILE SECTION
---------------------------------------------------------------------------------------------
main.c.o Model: SMALL, Lang: ANSI-C
RTSHC08.C.o (ansii.lib) Model: SMALL, Lang: ANSI-C
MC68HC908JL16.C.o Model: SMALL, Lang: ANSI-C
Start08.c.o Model: SMALL, Lang: ANSI-C
MCUinit.c.o Model: SMALL, Lang: ANSI-C
24c02.c.o Model: SMALL, Lang: ANSI-C
*********************************************************************************************
STARTUP SECTION
---------------------------------------------------------------------------------------------
Entry point: 0xBC8C (_Startup)
_startupData is allocated at 0xBC95 and uses 6 Bytes
extern struct _tagStartup {
unsigned nofZeroOut 1
_Range pZeroOut 0x100 119
_Copy *toCopyDownBeg 0xC423
} _startupData;
*********************************************************************************************
SECTION-ALLOCATION SECTION
Section Name Size Type From To Segment
---------------------------------------------------------------------------------------------
.data 32 R/W 0x100 0x11F RAM
.text 1898 R 0xBCA3 0xC40C ROM
.rodata 22 R 0xC40D 0xC422 ROM
.abs_section_0 1 N/I 0x0 0x0 .absSeg0
.abs_section_1 1 N/I 0x1 0x1 .absSeg1
.abs_section_3 1 N/I 0x3 0x3 .absSeg2
.abs_section_4 1 N/I 0x4 0x4 .absSeg3
.abs_section_5 1 N/I 0x5 0x5 .absSeg4
.abs_section_7 1 N/I 0x7 0x7 .absSeg5
.abs_section_8 1 N/I 0x8 0x8 .absSeg6
.abs_section_a 1 N/I 0xA 0xA .absSeg7
.abs_section_c 1 N/I 0xC 0xC .absSeg8
.abs_section_d 1 N/I 0xD 0xD .absSeg9
.abs_section_e 1 N/I 0xE 0xE .absSeg10
.abs_section_13 1 N/I 0x13 0x13 .absSeg11
.abs_section_14 1 N/I 0x14 0x14 .absSeg12
.abs_section_15 1 N/I 0x15 0x15 .absSeg13
.abs_section_16 1 N/I 0x16 0x16 .absSeg14
.abs_section_17 1 N/I 0x17 0x17 .absSeg15
.abs_section_18 1 N/I 0x18 0x18 .absSeg16
.abs_section_19 1 N/I 0x19 0x19 .absSeg17
.abs_section_1a 1 N/I 0x1A 0x1A .absSeg18
.abs_section_1b 1 N/I 0x1B 0x1B .absSeg19
.abs_section_1d 1 N/I 0x1D 0x1D .absSeg20
.abs_section_1e 1 N/I 0x1E 0x1E .absSeg21
.abs_section_1f 1 N/I 0x1F 0x1F .absSeg22
.abs_section_20 1 N/I 0x20 0x20 .absSeg23
.abs_section_25 1 N/I 0x25 0x25 .absSeg24
.abs_section_28 1 N/I 0x28 0x28 .absSeg25
.abs_section_30 1 N/I 0x30 0x30 .absSeg26
.abs_section_35 1 N/I 0x35 0x35 .absSeg27
.abs_section_38 1 N/I 0x38 0x38 .absSeg28
.abs_section_3c 1 N/I 0x3C 0x3C .absSeg29
.abs_section_3f 1 N/I 0x3F 0x3F .absSeg30
.abs_section_40 1 N/I 0x40 0x40 .absSeg31
.abs_section_41 1 N/I 0x41 0x41 .absSeg32
.abs_section_42 1 N/I 0x42 0x42 .absSeg33
.abs_section_43 1 N/I 0x43 0x43 .absSeg34
.abs_section_44 1 N/I 0x44 0x44 .absSeg35
.abs_section_45 1 N/I 0x45 0x45 .absSeg36
.abs_section_fe00 1 N/I 0xFE00 0xFE00 .absSeg37
.abs_section_fe01 1 N/I 0xFE01 0xFE01 .absSeg38
.abs_section_fe03 1 N/I 0xFE03 0xFE03 .absSeg39
.abs_section_fe04 1 N/I 0xFE04 0xFE04 .absSeg40
.abs_section_fe05 1 N/I 0xFE05 0xFE05 .absSeg41
.abs_section_fe06 1 N/I 0xFE06 0xFE06 .absSeg42
.abs_section_fe08 1 N/I 0xFE08 0xFE08 .absSeg43
.abs_section_fe0e 1 N/I 0xFE0E 0xFE0E .absSeg44
.abs_section_ffff 1 N/I 0xFFFF 0xFFFF .absSeg45
.abs_section_21 2 N/I 0x21 0x22 .absSeg46
.abs_section_23 2 N/I 0x23 0x24 .absSeg47
.abs_section_26 2 N/I 0x26 0x27 .absSeg48
.abs_section_29 2 N/I 0x29 0x2A .absSeg49
.abs_section_31 2 N/I 0x31 0x32 .absSeg50
.abs_section_33 2 N/I 0x33 0x34 .absSeg51
.abs_section_36 2 N/I 0x36 0x37 .absSeg52
.abs_section_39 2 N/I 0x39 0x3A .absSeg53
.abs_section_3d 2 N/I 0x3D 0x3E .absSeg54
.abs_section_fe0c 2 N/I 0xFE0C 0xFE0D .absSeg55
.abs_section_ffd0 1 R 0xFFD0 0xFFD0 .absSeg56
.abs_section_ffde 34 R 0xFFDE 0xFFFF .absSeg57
.bss 46 R/W 0x120 0x14D RAM
.startData 14 R 0xBC95 0xBCA2 ROM
.init 149 R 0xBC00 0xBC94 ROM
.common 41 R/W 0x14E 0x176 RAM
.stack 80 R/W 0x177 0x1C6 RAM
.copy 38 R 0xC423 0xC448 ROM
Summary of section sizes per section type:
READ_ONLY (R): 86C (dec: 2156)
READ_WRITE (R/W): C7 (dec: 199)
NO_INIT (N/I): 42 (dec: 66)
*********************************************************************************************
VECTOR-ALLOCATION SECTION
Address InitValue InitFunction
---------------------------------------------------------------------------------------------
*********************************************************************************************
OBJECT-ALLOCATION SECTION
Name Module Addr hSize dSize Ref Section RLIB
---------------------------------------------------------------------------------------------
MODULE: -- main.c.o --
- PROCEDURES:
main BCA3 12C 300 1 .text
delay BDCF 22 34 2 .text
sendbyte BDF1 3C 60 4 .text
printNum BE2D 166 358 6 .text
printNum2 BF93 109 265 6 .text
- VARIABLES:
tab C40D C 12 2 .rodata
duanma C419 A 10 5 .rodata
data 100 20 32 4 .data
p 120 1 1 2 .bss
q 121 1 1 3 .bss
b 122 2 2 19 .bss
d 124 2 2 10 .bss
date1 126 8 8 6 .bss
date2 12E 8 8 6 .bss
date3 136 8 8 1 .bss
date4 13E 8 8 1 .bss
date5 146 8 8 8 .bss
i 14E 2 2 5 .common
shuju 150 2 2 3 .common
b1 152 2 2 4 .common
b2 154 2 2 4 .common
b3 156 2 2 4 .common
b4 158 2 2 4 .common
b5 15A 2 2 4 .common
b1r 15C 2 2 4 .common
b2r 15E 2 2 4 .common
b3r 160 2 2 4 .common
b4r 162 2 2 4 .common
d1 164 2 2 3 .common
d2 166 2 2 3 .common
d3 168 2 2 3 .common
d4 16A 2 2 3 .common
d5 16C 2 2 3 .common
d1r 16E 2 2 2 .common
d2r 170 2 2 2 .common
d3r 172 2 2 2 .common
d4r 174 2 2 2 .common
j 176 1 1 10 .common
MODULE: -- RTSHC08.C.o (ansii.lib) --
- PROCEDURES:
_IDIVMOD C09C 69 105 2 .text
_IDIVU C105 10 16 9 .text
_IMODU C115 15 21 9 .text
_IDIVU_8 C12A C 12 1 .text
_IMODU_8 C136 10 16 1 .text
- VARIABLES:
MODULE: -- MC68HC908JL16.C.o --
- PROCEDURES:
- VARIABLES:
_PTA 0 1 1 31 .abs_section_0
_PTB 1 1 1 9 .abs_section_1
_PTD 3 1 1 6 .abs_section_3
_DDRA 4 1 1 7 .abs_section_4
_DDRB 5 1 1 1 .abs_section_5
_DDRD 7 1 1 2 .abs_section_7
_PTE 8 1 1 6 .abs_section_8
_PDCR A 1 1 0 .abs_section_a
_DDRE C 1 1 2 .abs_section_c
_PTAPUE D 1 1 0 .abs_section_d
_PTA7PUE E 1 1 0 .abs_section_e
_SCC1 13 1 1 2 .abs_section_13
_SCC2 14 1 1 6 .abs_section_14
_SCC3 15 1 1 2 .abs_section_15
_SCS1 16 1 1 5 .abs_section_16
_SCS2 17 1 1 1 .abs_section_17
_SCDR 18 1 1 3 .abs_section_18
_SCBR 19 1 1 1 .abs_section_19
_KBSCR 1A 1 1 0 .abs_section_1a
_KBIER 1B 1 1 0 .abs_section_1b
_INTSCR 1D 1 1 0 .abs_section_1d
_CONFIG2 1E 1 1 1 .abs_section_1e
_CONFIG1 1F 1 1 1 .abs_section_1f
_T1SC 20 1 1 6 .abs_section_20
_T1SC0 25 1 1 0 .abs_section_25
_T1SC1 28 1 1 0 .abs_section_28
_T2SC 30 1 1 6 .abs_section_30
_T2SC0 35 1 1 0 .abs_section_35
_T2SC1 38 1 1 0 .abs_section_38
_ADCSC 3C 1 1 2 .abs_section_3c
_ADCLK 3F 1 1 1 .abs_section_3f
_MIMCR 40 1 1 0 .abs_section_40
_MMADR 41 1 1 0 .abs_section_41
_MMCR 42 1 1 0 .abs_section_42
_MMSR 43 1 1 0 .abs_section_43
_MMDTR 44 1 1 0 .abs_section_44
_MMDRR 45 1 1 0 .abs_section_45
_BSR FE00 1 1 0 .abs_section_fe00
_RSR FE01 1 1 0 .abs_section_fe01
_BFCR FE03 1 1 0 .abs_section_fe03
_INT1 FE04 1 1 0 .abs_section_fe04
_INT2 FE05 1 1 0 .abs_section_fe05
_INT3 FE06 1 1 0 .abs_section_fe06
_FLCR FE08 1 1 0 .abs_section_fe08
_BRKSCR FE0E 1 1 0 .abs_section_fe0e
_COPCTL FFFF 1 1 0 .abs_section_ffff
_T1CNT 21 2 2 0 .abs_section_21
_T1MOD 23 2 2 1 .abs_section_23
_T1CH0 26 2 2 0 .abs_section_26
_T1CH1 29 2 2 0 .abs_section_29
_T2CNT 31 2 2 0 .abs_section_31
_T2MOD 33 2 2 1 .abs_section_33
_T2CH0 36 2 2 0 .abs_section_36
_T2CH1 39 2 2 0 .abs_section_39
_ADR 3D 2 2 1 .abs_section_3d
_BRK FE0C 2 2 0 .abs_section_fe0c
MODULE: -- Start08.c.o --
- PROCEDURES:
loadByte BC00 17 23 5 .init
Init BC17 75 117 1 .init
_Startup BC8C 9 9 1 .init
- VARIABLES:
_startupData BC95 6 6 6 .startData
- LABELS:
__SEG_END_SSTACK 1C7 0 0 1
MODULE: -- MCUinit.c.o --
- PROCEDURES:
MCU_init C146 5E 94 1 .text
isrINT_ADC C1A4 5 5 1 .text
isrINT_SCITransmit C1A9 15 21 1 .text
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