mouse_demo2.v

EP1C6Q240C8的examples 鼠标口测试程序

 
      `m1statetype_m1_rising_edge :
      begin
        visual_0_n_rise <= 1'b1;
        visual_0_m1_next_state <= `m1statetype_m1_rising_wait;  // m1_next_state <= m1_rising_wait;
      end
      `m1statetype_m1_rising_wait :
      begin
        visual_0_clean_clk <= 1'b1;
        if ((debounce_timer_done))
          visual_0_m1_next_state <= `m1statetype_m1_clk_h;
        else
          visual_0_m1_next_state <= `m1statetype_m1_rising_wait;
 
      end
      default  :
        visual_0_m1_next_state <= `m1statetype_m1_clk_h;
    endcase
 
                           // --------------------------end m1 atate
  end
 
  // ----------------m2 State
  always @( negedge (reset) or posedge clk )
  begin : m2statech
    if ((!reset))
      visual_0_m2_state <= `m2statetype_m2_reset;
    else
      visual_0_m2_state <= m2_next_state;
 
  end
 
  always @(m2_state or fall or rise or watchdog_timer_done or bitcount or
    ps2_data or packet_good)
  begin : m2statetr
    visual_0_ps2_clk_hi_z <= 1'b1;
    visual_0_ps2_data_hi_z <= 1'b1;
    visual_0_error_no_ack <= 1'b0;
    visual_0_output_strobe <= 1'b0;
    case (m2_state)
      `m2statetype_m2_reset :
        visual_0_m2_next_state <= `m2statetype_m2_hold_clk_l;
      `m2statetype_m2_wait :
        if ((fall))
          visual_0_m2_next_state <= `m2statetype_m2_gather;
        else
          visual_0_m2_next_state <= `m2statetype_m2_wait;
 
      `m2statetype_m2_gather :
        if ((watchdog_timer_done))  //  and (bitcount=TOTAL_BITS)
          visual_0_m2_next_state <= `m2statetype_m2_verify;
        else
          visual_0_m2_next_state <= `m2statetype_m2_gather;
 
      `m2statetype_m2_verify :
        visual_0_m2_next_state <= `m2statetype_m2_use;
      `m2statetype_m2_use :
      begin
        // end if;
        visual_0_output_strobe <= 1'b1;
        visual_0_m2_next_state <= `m2statetype_m2_wait;
      end
      `m2statetype_m2_hold_clk_l :
      begin
        visual_0_ps2_clk_hi_z <= 1'b0;  //  This starts the watchdog timer!
        if ((watchdog_timer_done))  //  cut "and (clean_clk='0')"
          visual_0_m2_next_state <= `m2statetype_m2_data_low_1;
        else
          visual_0_m2_next_state <= `m2statetype_m2_hold_clk_l;
 
      end
      `m2statetype_m2_data_low_1 :
      begin
        visual_0_ps2_data_hi_z <= 1'b0;  //  Forms start bit, d[0] and d[1]
        // data_out <= '0';
        if ((fall && (bitcount == 6'd2)))
          visual_0_m2_next_state <= `m2statetype_m2_data_high_1;
        else
          visual_0_m2_next_state <= `m2statetype_m2_data_low_1;
 
      end
      `m2statetype_m2_data_high_1 :
      begin
        visual_0_ps2_data_hi_z <= 1'b1;  //  Forms d[2]
        // data_out <= '1';
        if ((fall && (bitcount == 6'd3)))
          visual_0_m2_next_state <= `m2statetype_m2_data_low_2;
        else
          visual_0_m2_next_state <= `m2statetype_m2_data_high_1;
 
      end
      `m2statetype_m2_data_low_2 :
      begin
        visual_0_ps2_data_hi_z <= 1'b0;  //  Forms d[3]
        // data_out <= '0';
        if ((fall && (bitcount == 6'd4)))
          visual_0_m2_next_state <= `m2statetype_m2_data_high_2;
        else
          visual_0_m2_next_state <= `m2statetype_m2_data_low_2;
 
      end
      `m2statetype_m2_data_high_2 :
      begin
        visual_0_ps2_data_hi_z <= 1'b1;  //  Forms d[4],d[5],d[6],d[7]
        // data_out <= '1';
        if ((fall && (bitcount == 6'd8)))
          visual_0_m2_next_state <= `m2statetype_m2_data_low_3;
        else
          visual_0_m2_next_state <= `m2statetype_m2_data_high_2;
 
      end
      `m2statetype_m2_data_low_3 :
      begin
        visual_0_ps2_data_hi_z <= 1'b0;  //  Forms parity bit
        // data_out <= '0';
        if ((fall))
          visual_0_m2_next_state <= `m2statetype_m2_data_high_3;
        else
          visual_0_m2_next_state <= `m2statetype_m2_data_low_3;
 
      end
      `m2statetype_m2_data_high_3 :
      begin
        visual_0_ps2_data_hi_z <= 1'b1;  //  Allow mouse to pull low (ack pulse)
        if ((fall && (ps2_data)))
          visual_0_m2_next_state <= `m2statetype_m2_error_no_ack;
        else if ((fall && (!ps2_data)))
          visual_0_m2_next_state <= `m2statetype_m2_await_response;
        else
          visual_0_m2_next_state <= `m2statetype_m2_data_high_3;
 
      end
      `m2statetype_m2_error_no_ack :
      begin
        visual_0_error_no_ack <= 1'b1;
        visual_0_m2_next_state <= `m2statetype_m2_error_no_ack;
      end
      `m2statetype_m2_await_response :
        visual_0_m2_next_state <= `m2statetype_m2_verify;
      default  :
        visual_0_m2_next_state <= `m2statetype_m2_wait;
    endcase
 
                           // ---------------------------end m2 state
  end
 


  always @( negedge (reset) or posedge clk )
  begin : bitcoun
    if ((!reset))
      visual_0_bitcount <= {{6{ 1'b0 }}};  //  normal reset
    else
    begin
      if ((fall))
        visual_0_bitcount <= bitcount + 6'd1;
      else if ((watchdog_timer_done))
        visual_0_bitcount <= {{6{ 1'b0 }}};  //  rx watchdog timer reset
 
    end
 
  end
 

  always @( negedge (reset) or posedge clk )
  begin : dataseq
    if ((!reset))
      visual_0_q <= {{33{ 1'b0 }}};
    else
    begin
      if ((fall))
        visual_0_q <= {ps2_data , q[TOTAL_BITS - 1:1]};
 
    end
 
  end
 

  assign reset2 = (((reset == 1'b0) || (rise == 1'b1) || (fall == 1'b1)) ? 1'b0
                   : 1'b1);
  always @( negedge (reset2) or posedge clk )
  begin : watchcount
    if ((!reset2))
      visual_0_watchdog_timer_count <= {{9{ 1'b0 }}};
    else
    begin
      if ((!watchdog_timer_done))
        visual_0_watchdog_timer_count <= watchdog_timer_count + 9'd1;
 
    end
 
  end
 
  assign watchdog_timer_done = ((watchdog_timer_count == WATCHDOG - 1) ? 1'b1 :
    1'b0);
  always @( negedge (reset2) or posedge clk )
  begin : deboucount
    if ((!reset2))
      visual_0_debounce_timer_count <= {{2{ 1'b0 }}};
    else
    begin
      if ((!debounce_timer_done))
        visual_0_debounce_timer_count <= debounce_timer_count + 2'd1;
 
    end
 
  end
 
  assign debounce_timer_done = ((debounce_timer_count == DEBOUNCE_TIMER - 1) ?
    1'b1 : 1'b0);

  assign packet_good = 1'b1;

  always @( negedge (reset) or posedge clk )
  begin : outdata
    if ((!reset))
    begin
      visual_0_left_button <= 1'b0;
      visual_0_right_button <= 1'b0;
      visual_0_xsign <= 1'b0;
      visual_0_ysign <= 1'b0;
      visual_0_x_increment <= {{9{ 1'b0 }}};
      visual_0_y_increment <= {{9{ 1'b0 }}};
    end
    else
    begin
      if ((output_strobe))
      begin
        visual_0_left_button <= q[1];
        visual_0_right_button <= q[2];
        visual_0_xsign <= q[5];
        visual_0_ysign <= q[6];
        visual_0_x_increment <= {q[7] , q[8:1]};  // q(19 downto 12)
        visual_0_y_increment <= {q[8] , q[30:23]};
      end
 
    end
 
  end
 
 
endmodule
//--------------------------------------------------
//  
//  Library Name :  altera_demo
//  Unit    Name :  count64
//  Unit    Type :  Text Unit
//  
//----------------------------------------------------
 
module count64 (sysclk, reset, clkout
                );
 
  input sysclk;
  input reset;
  output clkout;
 
  wire [5:0] count;
 
  reg [5:0] visual_0_count;
  assign count = visual_0_count;
 
  always @( negedge (reset) or posedge sysclk )
  begin
    if ((!reset))
      visual_0_count <= {{6{ 1'b0 }}};
    else
      visual_0_count <= count + 1'b1;
 
  end
 
  assign clkout = count[5];
 
endmodule
//--------------------------------------------------
//  
//  Library Name :  altera_demo
//  Unit    Name :  ps2mouse_1
//  Unit    Type :  Text Unit
//  
//----------------------------------------------------
 
module mouse_demo2 (sysclk, reset, ps2clk, ps2data, seg_sel, seg,seg_cs
                   );
 
  input sysclk;
  input reset;
  inout ps2clk;
  inout ps2data;
  output [3:0] seg_sel;
  output [6:0] seg;
  output seg_cs;
 
  wire clk;
  wire left_button;
  wire right_button;
  wire xsign;
  wire ysign;
  wire [8:0] x_increment;
  wire [8:0] y_increment;
  wire error_no_ack;
  wire [41:0] control_bus_0;
  wire [15:0] data;
  wire [7:0] trig;
 
 
assign seg_cs='b0;

  count64  clocknum
    (
     .sysclk(sysclk),
     .reset(reset),
     .clkout(clk)
     );
 
  mouse  mousedata
    (
     .clk(clk),
     .reset(reset),
     .ps2_clk(ps2clk),
     .ps2_data(ps2data),
     .left_button(left_button),
     .right_button(right_button),
     .xsign(xsign),
     .ysign(ysign),
     .x_increment(x_increment),
     .y_increment(y_increment),
     .error_no_ack(error_no_ack)
     );
 
  segshow  showdata
    (
     .clk(clk),
     .reset(reset),
     .xdot(x_increment),
     .ydot(y_increment),
     .ledA1(seg_sel[0]),
     .ledA2(seg_sel[1]),
     .ledA3(seg_sel[2]),
     .ledA4(seg_sel[3]),
     .leddata(seg)
     );
 
endmodule