flash3.fit.rpt

EP1C6Q240C8的examples flash测试程序

; Top-level Entity Name ; FLASH3                                        ;
; Family                ; Cyclone                                       ;
; Device                ; EP1C6Q240C8                                   ;
; Timing Models         ; Final                                         ;
; Total logic elements  ; 1,435 / 5,980 ( 23 % )                        ;
; Total pins            ; 48 / 185 ( 25 % )                             ;
; Total virtual pins    ; 0                                             ;
; Total memory bits     ; 43,008 / 92,160 ( 46 % )                      ;
; Total PLLs            ; 0 / 2 ( 0 % )                                 ;
+-----------------------+-----------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------+
; Fitter Settings                                                                                                      ;
+----------------------------------------------------+--------------------------------+--------------------------------+
; Option                                             ; Setting                        ; Default Value                  ;
+----------------------------------------------------+--------------------------------+--------------------------------+
; Device                                             ; EP1C6Q240C8                    ;                                ;
; Use smart compilation                              ; Normal                         ; Normal                         ;
; Placement Effort Multiplier                        ; 1.0                            ; 1.0                            ;
; Router Effort Multiplier                           ; 1.0                            ; 1.0                            ;
; Optimize Hold Timing                               ; IO Paths and Minimum TPD Paths ; IO Paths and Minimum TPD Paths ;
; Optimize Fast-Corner Timing                        ; Off                            ; Off                            ;
; Optimize Timing                                    ; Normal compilation             ; Normal compilation             ;
; Optimize IOC Register Placement for Timing         ; On                             ; On                             ;
; Limit to One Fitting Attempt                       ; Off                            ; Off                            ;
; Final Placement Optimizations                      ; Automatically                  ; Automatically                  ;
; Fitter Initial Placement Seed                      ; 1                              ; 1                              ;
; Slow Slew Rate                                     ; Off                            ; Off                            ;
; PCI I/O                                            ; Off                            ; Off                            ;
; Weak Pull-Up Resistor                              ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                          ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                 ; Off                            ; Off                            ;
; Auto Packed Registers -- Cyclone                   ; Auto                           ; Auto                           ;
; Auto Delay Chains                                  ; On                             ; On                             ;
; Auto Merge PLLs                                    ; On                             ; On                             ;
; Perform Physical Synthesis for Combinational Logic ; Off                            ; Off                            ;
; Perform Register Duplication                       ; Off                            ; Off                            ;
; Perform Register Retiming                          ; Off                            ; Off                            ;
; Fitter Effort                                      ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                    ; Normal                         ; Normal                         ;
; Logic Cell Insertion - Logic Duplication           ; Auto                           ; Auto                           ;
; Auto Register Duplication                          ; Off                            ; Off                            ;
; Auto Global Clock                                  ; On                             ; On                             ;
; Auto Global Register Control Signals               ; On                             ; On                             ;
+----------------------------------------------------+--------------------------------+--------------------------------+


+-------------------------------------------------------------------------+
; Fitter Device Options                                                   ;
+----------------------------------------------+--------------------------+
; Option                                       ; Setting                  ;
+----------------------------------------------+--------------------------+
; Enable user-supplied start-up clock (CLKUSR) ; Off                      ;
; Enable device-wide reset (DEV_CLRn)          ; Off                      ;
; Enable device-wide output enable (DEV_OE)    ; Off                      ;
; Enable INIT_DONE output                      ; Off                      ;
; Configuration scheme                         ; Active Serial            ;
; Error detection CRC                          ; Off                      ;
; Reserve all unused pins                      ; As output driving ground ;
; Base pin-out file on sameframe device        ; Off                      ;
+----------------------------------------------+--------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Netlist Optimizations                                                                                                                                                                                                                                                                                                                                                     ;
+-------------------------------------------------------------------------------------------------------------------------------------+-----------------+------------------+----------------------------------------+-----------+-------------------------------------------------------------------------------------------------------------------------------+------------------+
; Node                                                                                                                                ; Action          ; Operation        ; Reason                                 ; Node Port ; Destination Node                                                                                                              ; Destination Port ;
+-------------------------------------------------------------------------------------------------------------------------------------+-----------------+------------------+----------------------------------------+-----------+-------------------------------------------------------------------------------------------------------------------------------+------------------+
; FOR_HT3:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[15]    ; Packed Register ; Register Packing ; Fast Input Register assignment         ; REGOUT    ; FLASH_D[15]                                                                                                                   ; COMBOUT          ;