📄 var_intr.h
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#ifndef CYGONCE_HAL_VAR_INTR_H
#define CYGONCE_HAL_VAR_INTR_H
//==========================================================================
//
// var_intr.h
//
// MCF5484 processor variant interrupt, exception and clock support
//
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
// Copyright (C) 2006 eCosCentric Ltd.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): Enrico Piria
// Contributors: Wade Jensen
// Date: 2005-25-06
// Purpose: Provide interrupt, exception and clock definitions specific
// to the MCF5484 processor.
// Usage: Included via "hal_intr.h". Do not use directly.
//
//####DESCRIPTIONEND####
//========================================================================
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
// Include any platform specific interrupt definitions.
#include <cyg/hal/plf_intr.h>
// Include for the device addresses (MCF5484_DEVS).
#include <cyg/hal/var_arch.h>
// Include for HAL I/O macros
#include <cyg/hal/hal_io.h>
// wanglei 20070904: for CYGPKG_KERNEL
#include <pkgconf/system.h>
// for system clock
#include CYGBLD_HAL_PLATFORM_H
// --------------------------------------------------------------------------
// Interrupt controller management
// This chip has a programmable interrupt vector base which is different
// from the vector base register (VBR). All interrupts from the interrupt
// controller are offset from the programmable interrupt vector register
// (PIVR). However, the only legal value is 64.
#define HAL_PROG_INT_VEC_BASE 64
// Vector numbers defined by the interrupt controller.
// These are all relative to the interrupt vector base number.
#define CYGNUM_HAL_INTERRUPT_USR_SPURINT (0 + HAL_PROG_INT_VEC_BASE)
#define CYGNUM_HAL_INTERRUPT_EXTINT1 (1 + HAL_PROG_INT_VEC_BASE)
#define CYGNUM_HAL_INTERRUPT_EXTINT2 (2 + HAL_PROG_INT_VEC_BASE)
#define CYGNUM_HAL_INTERRUPT_EXTINT3 (3 + HAL_PROG_INT_VEC_BASE)
#define CYGNUM_HAL_INTERRUPT_EXTINT4 (4 + HAL_PROG_INT_VEC_BASE)
#define CYGNUM_HAL_INTERRUPT_EXTINT5 (5 + HAL_PROG_INT_VEC_BASE)
#define CYGNUM_HAL_INTERRUPT_EXTINT6 (6 + HAL_PROG_INT_VEC_BASE)
#define CYGNUM_HAL_INTERRUPT_EXTINT7 (7 + HAL_PROG_INT_VEC_BASE)
// 8
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