📄 plf_intr.h
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#ifndef CYGONCE_HAL_PLF_INTR_H
#define CYGONCE_HAL_PLF_INTR_H
//==========================================================================
//
// plf_intr.h
//
// Platform specific interrupt and clock support
//
//
//==========================================================================
//####ECOSGPLCOPYRIGHTBEGIN####
// -------------------------------------------
// This file is part of eCos, the Embedded Configurable Operating System.
// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
// Copyright (C) 2006 eCosCentric Ltd.
//
// eCos is free software; you can redistribute it and/or modify it under
// the terms of the GNU General Public License as published by the Free
// Software Foundation; either version 2 or (at your option) any later version.
//
// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
// WARRANTY; without even the implied warranty of MERCHANTABILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with eCos; if not, write to the Free Software Foundation, Inc.,
// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
//
// As a special exception, if other files instantiate templates or use macros
// or inline functions from this file, or you compile this file and link it
// with other works to produce a work based on this file, this file does not
// by itself cause the resulting work to be covered by the GNU General Public
// License. However the source code for this file must still be made available
// in accordance with section (3) of the GNU General Public License.
//
// This exception does not invalidate any other reasons why a work based on
// this file might be covered by the GNU General Public License.
// -------------------------------------------
//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s): Enrico Piria
// Contributors: Wade Jensen
// Date: 2005-25-06
// Purpose: Interrupt and clock definitions specific to the M5272C3 board.
// Usage: Included via "var_intr.h". Do not use directly.
//
//####DESCRIPTIONEND####
//========================================================================
#include <pkgconf/hal.h>
#include <cyg/infra/cyg_type.h>
//for watchdog device:
#include <cyg/hal/hal_arch.h>
#include <cyg/hal/mcf5484_devs.h>
// ---------------------------------------------------------------------------
// Reset
#ifndef CYGHWR_HAL_RESET_DEFINED
externC void cyg_hal_reset_vsr( void );
#define CYGHWR_HAL_RESET_DEFINED
// wanglei 20070827: we need a hardware reset:
//#define HAL_PLATFORM_RESET() cyg_hal_reset_vsr()
// wanglei 20070827: perform watchdog expire to trigger hardware reset
#define HAL_PLATFORM_RESET() \
CYG_MACRO_START \
cyg_uint32 _dwRead_; \
HAL_WRITE_UINT32(&MCF5484_DEVS->GPT.gms0, 0x00); \
HAL_WRITE_UINT32(&MCF5484_DEVS->GPT.gms0, ( 0x00 \
|MCF5484_GPT_GMS_WDEN \
|MCF5484_GPT_GMS_IEN \
|MCF5484_GPT_GMS_TMS_INTERANL_TIMER)); \
HAL_WRITE_UINT32(&MCF5484_DEVS->GPT.gcir0, (0x00010000|0x0001)); \
HAL_READ_UINT32(&MCF5484_DEVS->GPT.gms0, _dwRead_); \
HAL_WRITE_UINT32(&MCF5484_DEVS->GPT.gms0, (_dwRead_|MCF5484_GPT_GMS_CE)); \
HAL_DELAY_US(1000); \
CYG_MACRO_END
#define HAL_PLATFORM_RESET_ENTRY &cyg_hal_reset_vsr
#endif // CYGHWR_HAL_RESET_DEFINED
// ---------------------------------------------------------------------------
// End of plf_intr.h
#endif // CYGONCE_HAL_PLF_INTR_H
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