spi_mcf5484.h

实现快速傅立叶变换算法,provides test framwork for FFT testing

//==========================================================================
//
//      spi_at91.h
//
//      Atmel AT91 (ARM) SPI driver defines
//
//==========================================================================
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// -------------------------------------------
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// or inline functions from this file, or you compile this file and link it
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//####ECOSGPLCOPYRIGHTEND####
//==========================================================================
//#####DESCRIPTIONBEGIN####
//
// Author(s):     WangLei 
// Date:          2007-05-21
//
//####DESCRIPTIONEND####
//
//==========================================================================

#ifndef _SPI_MCF5484_H_
#define _SPI_MCF5484_H_

#include <pkgconf/hal.h>
#include <pkgconf/io_spi.h>

#include <cyg/infra/cyg_type.h>
#include <cyg/hal/drv_api.h>
#include <cyg/io/spi.h>

//---------------------------------------------------------------------------
// const defines
//---------------------------------------------------------------------------
#define MCF5484_DSPI_INT_LEVEL 6
#define MCF5484_DSPI_TRAN_INT_PRIO   2
#define MCF5484_DSPI_ERROR_INT_PRIO  1

//---------------------------------------------------------------------------
// types
//---------------------------------------------------------------------------
// MCF5484 SPI BUS:
typedef struct cyg_spi_mcf54_bus_s
{
    // ---- Upper layer data ----

    cyg_spi_bus   spi_bus;                       // Upper layer SPI bus data

    // ---- Lower layer data ----
    volatile mcf5484_dspi_t         *base;       // Base Address of the SPI peripheral
    
    cyg_vector_t      num_intr_rfoftfuf;         // SPI Interrupt Number: DSPI rx overflow or tx underflow
    cyg_vector_t      num_intr_rfdf;             //                       Rx FIFO drain interrupt
    cyg_vector_t      num_intr_tcf;              //                       Transfer complete interrupt
    cyg_vector_t      num_intr_tfff;             //                       Tx FIFO fill interrupt
    cyg_vector_t      num_intr_eoqf;             //                       End of queue interrupt
    
    cyg_interrupt     spi_intr_rfoftfuf;         // SPI interrupt object
    cyg_handle_t      spi_intr_rfoftfuf_handle;  // SPI interrupt handle
    
    cyg_interrupt     spi_intr_rfdf;             // SPI interrupt object
    cyg_handle_t      spi_intr_rfdf_handle;      // SPI interrupt handle
    
    cyg_interrupt     spi_intr_tcf;              // SPI interrupt object
    cyg_handle_t      spi_intr_tcf_handle;       // SPI interrupt handle
    
    cyg_interrupt     spi_intr_tfff;             // SPI interrupt object
    cyg_handle_t      spi_intr_tfff_handle;      // SPI interrupt handle
    
    cyg_interrupt     spi_intr_eoqf;             // SPI interrupt object
    cyg_handle_t      spi_intr_eoqf_handle;      // SPI interrupt handle
    
    
    //cyg_drv_mutex_t   transfer_mx;               // Transfer mutex
    //cyg_drv_cond_t    transfer_cond;             // Transfer condition
    
    //cyg_bool          transfer_end;              // Transfer end flag
        
} cyg_spi_mcf54_bus_t;

// MCF5484 SPI DEVICE:
typedef struct cyg_spi_mcf54_device_s
{
    // ---- Upper layer data ----

    cyg_spi_device spi_device;  // Upper layer SPI device data

    // ---- Lower layer data (configurable) ----

    cyg_uint8  dev_num;         // Device number
    cyg_uint8  cl_pol;          // Clock polarity (0 or 1)
    cyg_uint8  cl_pha;          // Clock phase    (0 or 1)
    cyg_uint8  lsb;             // 0:MSB, 1:LSB
    cyg_uint8  pbr;;            // Clock baud rate -- prescalar
    cyg_uint8  br;              //                 -- scalar
    cyg_uint8  pcssck;          // Delay between CS up and transfer start -- prescalar
    cyg_uint8  cssck;           //                                        -- scalar
    cyg_uint8  pasc;            // Delay between transfer end and CS down -- prescalar
    cyg_uint8  asc;             //                                        -- scalar
    cyg_uint8  pdt;             // Delay between two transfer -- prescalar
    cyg_uint8  dt;              //                            -- scalar
    cyg_uint8  csck;            // continues DSPISCK
    cyg_uint8  tr_size;         // Transfer size
    cyg_uint8  ctas;            // DCTAR index (which DCTAR is used)
    bool       fifo_used;       // notify the SPI device whether use FIFO
} cyg_spi_mcf54_device_t;


// MCF5484 SPI exported busses:
// For backwards compatability:
externC cyg_spi_mcf54_bus_t cyg_spi_mcf54_bus;

// configuration data
typedef struct spi_mcf54_baudrate_info
{
    cyg_uint8 pbr;  //Prescaler value of baud rate
    cyg_uint8 br;   //Scalar value of baud rate
}spi_mcf54_baudrate_info_t;


#endif // _SPI_MCF5484_H_ 

//-----------------------------------------------------------------------------
// End of spi_mcf5484.h