mc68hc908jb16.h

bdm源代码. coldfire处理器用

    #define T1CH1L_BIT5 _T1CH1.Overlap_STR.T1CH1LSTR.Bits.BIT5
    #define T1CH1L_BIT6 _T1CH1.Overlap_STR.T1CH1LSTR.Bits.BIT6
    #define T1CH1L_BIT7 _T1CH1.Overlap_STR.T1CH1LSTR.Bits.BIT7

    #define T1CH1L_BIT _T1CH1.Overlap_STR.T1CH1LSTR.MergedBits.grpBIT

    #define T1CH1L_BIT0_MASK   1
    #define T1CH1L_BIT0_BITNUM 0
    #define T1CH1L_BIT1_MASK   2
    #define T1CH1L_BIT1_BITNUM 1
    #define T1CH1L_BIT2_MASK   4
    #define T1CH1L_BIT2_BITNUM 2
    #define T1CH1L_BIT3_MASK   8
    #define T1CH1L_BIT3_BITNUM 3
    #define T1CH1L_BIT4_MASK   16
    #define T1CH1L_BIT4_BITNUM 4
    #define T1CH1L_BIT5_MASK   32
    #define T1CH1L_BIT5_BITNUM 5
    #define T1CH1L_BIT6_MASK   64
    #define T1CH1L_BIT6_BITNUM 6
    #define T1CH1L_BIT7_MASK   128
    #define T1CH1L_BIT7_BITNUM 7
    #define T1CH1L_BIT_MASK  255
    #define T1CH1L_BIT_BITNUM  0

  } Overlap_STR;

  struct {
    word grpBIT  :16;
  } MergedBits;
} T1CH1STR;
extern volatile T1CH1STR _T1CH1 @0x00000014;
#define T1CH1 _T1CH1.Word
#define T1CH1_BIT _T1CH1.MergedBits.grpBIT

#define T1CH1_BIT_MASK  65535
#define T1CH1_BIT_BITNUM  0


/*** KBSCR - Keyboard Status and Control Register; 0x00000016 ***/
typedef union {
  byte Byte;
  struct {
    byte MODEK       :1;                                       /* Keyboard Triggering Sensitivity Bit */
    byte IMASKK      :1;                                       /* Keyboard Interrupt Mask Bit */
    byte ACKK        :1;                                       /* Keyboard Acknowledge Bit */
    byte KEYF        :1;                                       /* Keyboard Flag Bit */
    byte             :1;
    byte             :1;
    byte             :1;
    byte             :1;
  } Bits;
} KBSCRSTR;
extern volatile KBSCRSTR _KBSCR @0x00000016;
#define KBSCR _KBSCR.Byte
#define KBSCR_MODEK _KBSCR.Bits.MODEK
#define KBSCR_IMASKK _KBSCR.Bits.IMASKK
#define KBSCR_ACKK _KBSCR.Bits.ACKK
#define KBSCR_KEYF _KBSCR.Bits.KEYF

#define KBSCR_MODEK_MASK   1
#define KBSCR_MODEK_BITNUM 0
#define KBSCR_IMASKK_MASK   2
#define KBSCR_IMASKK_BITNUM 1
#define KBSCR_ACKK_MASK   4
#define KBSCR_ACKK_BITNUM 2
#define KBSCR_KEYF_MASK   8
#define KBSCR_KEYF_BITNUM 3


/*** KBIER - Keyboard Interrrupt Enable Register KBIER; 0x00000017 ***/
typedef union {
  byte Byte;
  struct {
    byte KBIE0       :1;                                       /* Keyboard Interrupt Enable Bit 0 */
    byte KBIE1       :1;                                       /* Keyboard Interrupt Enable Bit 1 */
    byte KBIE2       :1;                                       /* Keyboard Interrupt Enable Bit 2 */
    byte KBIE3       :1;                                       /* Keyboard Interrupt Enable Bit 3 */
    byte KBIE4       :1;                                       /* Keyboard Interrupt Enable Bit 4 */
    byte KBIE5       :1;                                       /* Keyboard Interrupt Enable Bit 5 */
    byte KBIE6       :1;                                       /* Keyboard Interrupt Enable Bit 6 */
    byte KBIE7       :1;                                       /* Keyboard Interrupt Enable Bit 7 */
  } Bits;
  struct {
    byte grpKBIE :8;
  } MergedBits;
} KBIERSTR;
extern volatile KBIERSTR _KBIER @0x00000017;
#define KBIER _KBIER.Byte
#define KBIER_KBIE0 _KBIER.Bits.KBIE0
#define KBIER_KBIE1 _KBIER.Bits.KBIE1
#define KBIER_KBIE2 _KBIER.Bits.KBIE2
#define KBIER_KBIE3 _KBIER.Bits.KBIE3
#define KBIER_KBIE4 _KBIER.Bits.KBIE4
#define KBIER_KBIE5 _KBIER.Bits.KBIE5
#define KBIER_KBIE6 _KBIER.Bits.KBIE6
#define KBIER_KBIE7 _KBIER.Bits.KBIE7
#define KBIER_KBIE _KBIER.MergedBits.grpKBIE

#define KBIER_KBIE0_MASK   1
#define KBIER_KBIE0_BITNUM 0
#define KBIER_KBIE1_MASK   2
#define KBIER_KBIE1_BITNUM 1
#define KBIER_KBIE2_MASK   4
#define KBIER_KBIE2_BITNUM 2
#define KBIER_KBIE3_MASK   8
#define KBIER_KBIE3_BITNUM 3
#define KBIER_KBIE4_MASK   16
#define KBIER_KBIE4_BITNUM 4
#define KBIER_KBIE5_MASK   32
#define KBIER_KBIE5_BITNUM 5
#define KBIER_KBIE6_MASK   64
#define KBIER_KBIE6_BITNUM 6
#define KBIER_KBIE7_MASK   128
#define KBIER_KBIE7_BITNUM 7
#define KBIER_KBIE_MASK  255
#define KBIER_KBIE_BITNUM  0


/*** UIR2 - USB Interrupt Register 2; 0x00000018 ***/
typedef union {
  byte Byte;
  struct {
    byte RXD0FR      :1;                                       /* Endpoint 0 Receive Flag Reset */
    byte TXD0FR      :1;                                       /* Endpoint 0 Transmit Flag Reset */
    byte RESUMFR     :1;                                       /* Resume Flag Reset */
    byte TXD1FR      :1;                                       /* Endpoint 1 Transmit Flag Reset */
    byte RXD2FR      :1;                                       /* Endpoint 2 Receive Flag Reset */
    byte TXD2FR      :1;                                       /* Endpoint 2 Transmit Flag Reset */
    byte RSTFR       :1;                                       /* Clear Reset Indicator Bit */
    byte EOPFR       :1;                                       /* End-of-Packet Flag Reset */
  } Bits;
} UIR2STR;
extern volatile UIR2STR _UIR2 @0x00000018;
#define UIR2 _UIR2.Byte
#define UIR2_RXD0FR _UIR2.Bits.RXD0FR
#define UIR2_TXD0FR _UIR2.Bits.TXD0FR
#define UIR2_RESUMFR _UIR2.Bits.RESUMFR
#define UIR2_TXD1FR _UIR2.Bits.TXD1FR
#define UIR2_RXD2FR _UIR2.Bits.RXD2FR
#define UIR2_TXD2FR _UIR2.Bits.TXD2FR
#define UIR2_RSTFR _UIR2.Bits.RSTFR
#define UIR2_EOPFR _UIR2.Bits.EOPFR

#define UIR2_RXD0FR_MASK   1
#define UIR2_RXD0FR_BITNUM 0
#define UIR2_TXD0FR_MASK   2
#define UIR2_TXD0FR_BITNUM 1
#define UIR2_RESUMFR_MASK   4
#define UIR2_RESUMFR_BITNUM 2
#define UIR2_TXD1FR_MASK   8
#define UIR2_TXD1FR_BITNUM 3
#define UIR2_RXD2FR_MASK   16
#define UIR2_RXD2FR_BITNUM 4
#define UIR2_TXD2FR_MASK   32
#define UIR2_TXD2FR_BITNUM 5
#define UIR2_RSTFR_MASK   64
#define UIR2_RSTFR_BITNUM 6
#define UIR2_EOPFR_MASK   128
#define UIR2_EOPFR_BITNUM 7


/*** UCR2 - USB Control Register 2; 0x00000019 ***/
typedef union {
  byte Byte;
  struct {
    byte TP2SIZ0     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 0 */
    byte TP2SIZ1     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 1 */
    byte TP2SIZ2     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 2 */
    byte TP2SIZ3     :1;                                       /* Endpoint 2 Transmit Data Packet Size Bit 3 */
    byte RX2E        :1;                                       /* Endpoint 2 Receive Enable */
    byte TX2E        :1;                                       /* Endpoint 2 Transmit Enable */
    byte STALL       :1;                                       /* Endpoint 2 Force Stall Bit */
    byte T2SEQ       :1;                                       /* Endpoint 2 Transmit Sequence Bit */
  } Bits;
  struct {
    byte grpTP2SIZ :4;
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} UCR2STR;
extern volatile UCR2STR _UCR2 @0x00000019;
#define UCR2 _UCR2.Byte
#define UCR2_TP2SIZ0 _UCR2.Bits.TP2SIZ0
#define UCR2_TP2SIZ1 _UCR2.Bits.TP2SIZ1
#define UCR2_TP2SIZ2 _UCR2.Bits.TP2SIZ2
#define UCR2_TP2SIZ3 _UCR2.Bits.TP2SIZ3
#define UCR2_RX2E _UCR2.Bits.RX2E
#define UCR2_TX2E _UCR2.Bits.TX2E
#define UCR2_STALL _UCR2.Bits.STALL
#define UCR2_T2SEQ _UCR2.Bits.T2SEQ
#define UCR2_TP2SIZ _UCR2.MergedBits.grpTP2SIZ

#define UCR2_TP2SIZ0_MASK   1
#define UCR2_TP2SIZ0_BITNUM 0
#define UCR2_TP2SIZ1_MASK   2
#define UCR2_TP2SIZ1_BITNUM 1
#define UCR2_TP2SIZ2_MASK   4
#define UCR2_TP2SIZ2_BITNUM 2
#define UCR2_TP2SIZ3_MASK   8
#define UCR2_TP2SIZ3_BITNUM 3
#define UCR2_RX2E_MASK   16
#define UCR2_RX2E_BITNUM 4
#define UCR2_TX2E_MASK   32
#define UCR2_TX2E_BITNUM 5
#define UCR2_STALL_MASK   64
#define UCR2_STALL_BITNUM 6
#define UCR2_T2SEQ_MASK   128
#define UCR2_T2SEQ_BITNUM 7
#define UCR2_TP2SIZ_MASK  15
#define UCR2_TP2SIZ_BITNUM  0


/*** UCR3 - USB Control Register 3; 0x0000001A ***/
typedef union {
  byte Byte;
  struct {
    byte ENABLE1     :1;                                       /* Endpoint 1 Enable */
    byte ENABLE2     :1;                                       /* Endpoint 2 Enable */
    byte PULLEN      :1;                                       /* Pull-up Enable */
    byte             :1;
    byte ISTALL0     :1;                                       /* Endpoint 0 Force STALL Bit for IN token */
    byte OSTALL0     :1;                                       /* Endpoint 0 Force STALL Bit for OUT token */
    byte TX1STR      :1;                                       /* Clear Endpoint 0 Transmit First Flag */
    byte TX1ST       :1;                                       /* Endpoint 0 Transmit First Flag */
  } Bits;
  struct {
    byte grpENABLE_1 :2;
    byte         :1;
    byte         :1;
    byte grpISTALL :1;
    byte grpOSTALL :1;
    byte         :1;
    byte         :1;
  } MergedBits;
} UCR3STR;
extern volatile UCR3STR _UCR3 @0x0000001A;
#define UCR3 _UCR3.Byte
#define UCR3_ENABLE1 _UCR3.Bits.ENABLE1
#define UCR3_ENABLE2 _UCR3.Bits.ENABLE2
#define UCR3_PULLEN _UCR3.Bits.PULLEN
#define UCR3_ISTALL0 _UCR3.Bits.ISTALL0
#define UCR3_OSTALL0 _UCR3.Bits.OSTALL0
#define UCR3_TX1STR _UCR3.Bits.TX1STR
#define UCR3_TX1ST _UCR3.Bits.TX1ST
#define UCR3_ENABLE_1 _UCR3.MergedBits.grpENABLE_1
#define UCR3_ENABLE UCR3_ENABLE_1

#define UCR3_ENABLE1_MASK   1
#define UCR3_ENABLE1_BITNUM 0
#define UCR3_ENABLE2_MASK   2
#define UCR3_ENABLE2_BITNUM 1
#define UCR3_PULLEN_MASK   4
#define UCR3_PULLEN_BITNUM 2
#define UCR3_ISTALL0_MASK   16
#define UCR3_ISTALL0_BITNUM 4
#define UCR3_OSTALL0_MASK   32
#define UCR3_OSTALL0_BITNUM 5
#define UCR3_TX1STR_MASK   64
#define UCR3_TX1STR_BITNUM 6
#define UCR3_TX1ST_MASK   128
#define UCR3_TX1ST_BITNUM 7
#define UCR3_ENABLE_1_MASK  3
#define UCR3_ENABLE_1_BITNUM  0


/*** UCR4 - USB Control Register 4; 0x0000001B ***/
typedef union {
  byte Byte;
  struct {
    byte FDM         :1;                                       /* Force D- */
    byte FDP         :1;                                       /* Force D+ */
    byte FUSBO       :1;                                       /* Force USB Output */
    byte             :1;
    byte             :1;
    byte             :1;
    byte             :1;
    byte             :1;
  } Bits;
} UCR4STR;
extern volatile UCR4STR _UCR4 @0x0000001B;
#define UCR4 _UCR4.Byte
#define UCR4_FDM _UCR4.Bits.FDM
#define UCR4_FDP _UCR4.Bits.FDP
#define UCR4_FUSBO _UCR4.Bits.FUSBO

#define UCR4_FDM_MASK   1
#define UCR4_FDM_BITNUM 0
#define UCR4_FDP_MASK   2
#define UCR4_FDP_BITNUM 1
#define UCR4_FUSBO_MASK   4
#define UCR4_FUSBO_BITNUM 2


/*** IOCR - IRQ Option Register; 0x0000001C ***/
typedef union {
  byte Byte;
  struct {
    byte IRQPD       :1;                                       /* IRQ Pullup Disable */
    byte PTE4IE      :1;                                       /* PTE4 Interrupt Enable */
    byte PTE4IF      :1;                                       /* PTE4 Interrupt Flag */
    byte             :1;
    byte             :1;
    byte             :1;
    byte             :1;
    byte             :1;
  } Bits;
} IOCRSTR;
extern volatile IOCRSTR _IOCR @0x0000001C;
#define IOCR _IOCR.Byte
#define IOCR_IRQPD _IOCR.Bits.IRQPD
#define IOCR_PTE4IE _IOCR.Bits.PTE4IE
#define IOCR_PTE4IF _IOCR.Bits.PTE4IF

#define IOCR_IRQPD_MASK   1
#define IOCR_IRQPD_BITNUM 0
#define IOCR_PTE4IE_MASK   2
#define IOCR_PTE4IE_BITNUM 1
#define IOCR_PTE4IF_MASK   4
#define IOCR_PTE4IF_BITNUM 2