📄 mc68hc908jb16.h
字号:
byte :1;
byte :1;
byte :1;
} MergedBits;
} PTESTR;
extern volatile PTESTR _PTE @0x00000008;
#define PTE _PTE.Byte
#define PTE_PTE0 _PTE.Bits.PTE0
#define PTE_PTE1 _PTE.Bits.PTE1
#define PTE_PTE2 _PTE.Bits.PTE2
#define PTE_PTE3 _PTE.Bits.PTE3
#define PTE_PTE4 _PTE.Bits.PTE4
#define PTE_PTE _PTE.MergedBits.grpPTE
#define PTE_PTE0_MASK 1
#define PTE_PTE0_BITNUM 0
#define PTE_PTE1_MASK 2
#define PTE_PTE1_BITNUM 1
#define PTE_PTE2_MASK 4
#define PTE_PTE2_BITNUM 2
#define PTE_PTE3_MASK 8
#define PTE_PTE3_BITNUM 3
#define PTE_PTE4_MASK 16
#define PTE_PTE4_BITNUM 4
#define PTE_PTE_MASK 31
#define PTE_PTE_BITNUM 0
/*** DDRE - Data Direction Register E; 0x00000009 ***/
typedef union {
byte Byte;
struct {
byte DDRE0 :1; /* Data Direction Register E Bit 0 */
byte DDRE1 :1; /* Data Direction Register E Bit 1 */
byte DDRE2 :1; /* Data Direction Register E Bit 2 */
byte DDRE3 :1; /* Data Direction Register E Bit 3 */
byte DDRE4 :1; /* Data Direction Register E Bit 4 */
byte :1;
byte :1;
byte :1;
} Bits;
struct {
byte grpDDRE :5;
byte :1;
byte :1;
byte :1;
} MergedBits;
} DDRESTR;
extern volatile DDRESTR _DDRE @0x00000009;
#define DDRE _DDRE.Byte
#define DDRE_DDRE0 _DDRE.Bits.DDRE0
#define DDRE_DDRE1 _DDRE.Bits.DDRE1
#define DDRE_DDRE2 _DDRE.Bits.DDRE2
#define DDRE_DDRE3 _DDRE.Bits.DDRE3
#define DDRE_DDRE4 _DDRE.Bits.DDRE4
#define DDRE_DDRE _DDRE.MergedBits.grpDDRE
#define DDRE_DDRE0_MASK 1
#define DDRE_DDRE0_BITNUM 0
#define DDRE_DDRE1_MASK 2
#define DDRE_DDRE1_BITNUM 1
#define DDRE_DDRE2_MASK 4
#define DDRE_DDRE2_BITNUM 2
#define DDRE_DDRE3_MASK 8
#define DDRE_DDRE3_BITNUM 3
#define DDRE_DDRE4_MASK 16
#define DDRE_DDRE4_BITNUM 4
#define DDRE_DDRE_MASK 31
#define DDRE_DDRE_BITNUM 0
/*** T1SC - TIM Status and Control Register TSC; 0x0000000A ***/
typedef union {
byte Byte;
struct {
byte PS0 :1; /* Prescaler Select Bit */
byte PS1 :1; /* Prescaler Select Bit */
byte PS2 :1; /* Prescaler Select Bit */
byte :1;
byte TRST :1; /* TIM1 Reset Bit */
byte TSTOP :1; /* TIM1 Stop Bit */
byte TOIE :1; /* TIM1 Overflow Interrupt Enable Bit */
byte TOF :1; /* TIM1 Overflow Flag Bit */
} Bits;
struct {
byte grpPS :3;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} T1SCSTR;
extern volatile T1SCSTR _T1SC @0x0000000A;
#define T1SC _T1SC.Byte
#define T1SC_PS0 _T1SC.Bits.PS0
#define T1SC_PS1 _T1SC.Bits.PS1
#define T1SC_PS2 _T1SC.Bits.PS2
#define T1SC_TRST _T1SC.Bits.TRST
#define T1SC_TSTOP _T1SC.Bits.TSTOP
#define T1SC_TOIE _T1SC.Bits.TOIE
#define T1SC_TOF _T1SC.Bits.TOF
#define T1SC_PS _T1SC.MergedBits.grpPS
#define T1SC_PS0_MASK 1
#define T1SC_PS0_BITNUM 0
#define T1SC_PS1_MASK 2
#define T1SC_PS1_BITNUM 1
#define T1SC_PS2_MASK 4
#define T1SC_PS2_BITNUM 2
#define T1SC_TRST_MASK 16
#define T1SC_TRST_BITNUM 4
#define T1SC_TSTOP_MASK 32
#define T1SC_TSTOP_BITNUM 5
#define T1SC_TOIE_MASK 64
#define T1SC_TOIE_BITNUM 6
#define T1SC_TOF_MASK 128
#define T1SC_TOF_BITNUM 7
#define T1SC_PS_MASK 7
#define T1SC_PS_BITNUM 0
/*** T1CNT - TIM Counter Register; 0x0000000C ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** T1CNTH - TIM Counter Register Low; 0x0000000C ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* TIM1 Counter Bit */
byte BIT9 :1; /* TIM1 Counter Bit */
byte BIT10 :1; /* TIM1 Counter Bit */
byte BIT11 :1; /* TIM1 Counter Bit */
byte BIT12 :1; /* TIM1 Counter Bit */
byte BIT13 :1; /* TIM1 Counter Bit */
byte BIT14 :1; /* TIM1 Counter Bit */
byte BIT15 :1; /* TIM1 Counter Bit */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} T1CNTHSTR;
#define T1CNTH _T1CNT.Overlap_STR.T1CNTHSTR.Byte
#define T1CNTH_BIT8 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT8
#define T1CNTH_BIT9 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT9
#define T1CNTH_BIT10 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT10
#define T1CNTH_BIT11 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT11
#define T1CNTH_BIT12 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT12
#define T1CNTH_BIT13 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT13
#define T1CNTH_BIT14 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT14
#define T1CNTH_BIT15 _T1CNT.Overlap_STR.T1CNTHSTR.Bits.BIT15
#define T1CNTH_BIT_8 _T1CNT.Overlap_STR.T1CNTHSTR.MergedBits.grpBIT_8
#define T1CNTH_BIT T1CNTH_BIT_8
#define T1CNTH_BIT8_MASK 1
#define T1CNTH_BIT8_BITNUM 0
#define T1CNTH_BIT9_MASK 2
#define T1CNTH_BIT9_BITNUM 1
#define T1CNTH_BIT10_MASK 4
#define T1CNTH_BIT10_BITNUM 2
#define T1CNTH_BIT11_MASK 8
#define T1CNTH_BIT11_BITNUM 3
#define T1CNTH_BIT12_MASK 16
#define T1CNTH_BIT12_BITNUM 4
#define T1CNTH_BIT13_MASK 32
#define T1CNTH_BIT13_BITNUM 5
#define T1CNTH_BIT14_MASK 64
#define T1CNTH_BIT14_BITNUM 6
#define T1CNTH_BIT15_MASK 128
#define T1CNTH_BIT15_BITNUM 7
#define T1CNTH_BIT_8_MASK 255
#define T1CNTH_BIT_8_BITNUM 0
/*** T1CNTL - TIM Counter Register Low; 0x0000000D ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* TIM1 Counter Bit */
byte BIT1 :1; /* TIM1 Counter Bit */
byte BIT2 :1; /* TIM1 Counter Bit */
byte BIT3 :1; /* TIM1 Counter Bit */
byte BIT4 :1; /* TIM1 Counter Bit */
byte BIT5 :1; /* TIM1 Counter Bit */
byte BIT6 :1; /* TIM1 Counter Bit */
byte BIT7 :1; /* TIM1 Counter Bit */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} T1CNTLSTR;
#define T1CNTL _T1CNT.Overlap_STR.T1CNTLSTR.Byte
#define T1CNTL_BIT0 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT0
#define T1CNTL_BIT1 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT1
#define T1CNTL_BIT2 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT2
#define T1CNTL_BIT3 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT3
#define T1CNTL_BIT4 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT4
#define T1CNTL_BIT5 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT5
#define T1CNTL_BIT6 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT6
#define T1CNTL_BIT7 _T1CNT.Overlap_STR.T1CNTLSTR.Bits.BIT7
#define T1CNTL_BIT _T1CNT.Overlap_STR.T1CNTLSTR.MergedBits.grpBIT
#define T1CNTL_BIT0_MASK 1
#define T1CNTL_BIT0_BITNUM 0
#define T1CNTL_BIT1_MASK 2
#define T1CNTL_BIT1_BITNUM 1
#define T1CNTL_BIT2_MASK 4
#define T1CNTL_BIT2_BITNUM 2
#define T1CNTL_BIT3_MASK 8
#define T1CNTL_BIT3_BITNUM 3
#define T1CNTL_BIT4_MASK 16
#define T1CNTL_BIT4_BITNUM 4
#define T1CNTL_BIT5_MASK 32
#define T1CNTL_BIT5_BITNUM 5
#define T1CNTL_BIT6_MASK 64
#define T1CNTL_BIT6_BITNUM 6
#define T1CNTL_BIT7_MASK 128
#define T1CNTL_BIT7_BITNUM 7
#define T1CNTL_BIT_MASK 255
#define T1CNTL_BIT_BITNUM 0
} Overlap_STR;
struct {
word grpBIT :16;
} MergedBits;
} T1CNTSTR;
extern volatile T1CNTSTR _T1CNT @0x0000000C;
#define T1CNT _T1CNT.Word
#define T1CNT_BIT _T1CNT.MergedBits.grpBIT
#define T1CNT_BIT_MASK 65535
#define T1CNT_BIT_BITNUM 0
/*** T1MOD - TIM Counter Modulo Register; 0x0000000E ***/
typedef union {
word Word;
/* Overlapped registers: */
struct {
/*** T1MODH - TIM Counter Modulo Register High; 0x0000000E ***/
union {
byte Byte;
struct {
byte BIT8 :1; /* TIM1 Counter Modulo Bit */
byte BIT9 :1; /* TIM1 Counter Modulo Bit */
byte BIT10 :1; /* TIM1 Counter Modulo Bit */
byte BIT11 :1; /* TIM1 Counter Modulo Bit */
byte BIT12 :1; /* TIM1 Counter Modulo Bit */
byte BIT13 :1; /* TIM1 Counter Modulo Bit */
byte BIT14 :1; /* TIM1 Counter Modulo Bit */
byte BIT15 :1; /* TIM1 Counter Modulo Bit */
} Bits;
struct {
byte grpBIT_8 :8;
} MergedBits;
} T1MODHSTR;
#define T1MODH _T1MOD.Overlap_STR.T1MODHSTR.Byte
#define T1MODH_BIT8 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT8
#define T1MODH_BIT9 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT9
#define T1MODH_BIT10 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT10
#define T1MODH_BIT11 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT11
#define T1MODH_BIT12 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT12
#define T1MODH_BIT13 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT13
#define T1MODH_BIT14 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT14
#define T1MODH_BIT15 _T1MOD.Overlap_STR.T1MODHSTR.Bits.BIT15
#define T1MODH_BIT_8 _T1MOD.Overlap_STR.T1MODHSTR.MergedBits.grpBIT_8
#define T1MODH_BIT T1MODH_BIT_8
#define T1MODH_BIT8_MASK 1
#define T1MODH_BIT8_BITNUM 0
#define T1MODH_BIT9_MASK 2
#define T1MODH_BIT9_BITNUM 1
#define T1MODH_BIT10_MASK 4
#define T1MODH_BIT10_BITNUM 2
#define T1MODH_BIT11_MASK 8
#define T1MODH_BIT11_BITNUM 3
#define T1MODH_BIT12_MASK 16
#define T1MODH_BIT12_BITNUM 4
#define T1MODH_BIT13_MASK 32
#define T1MODH_BIT13_BITNUM 5
#define T1MODH_BIT14_MASK 64
#define T1MODH_BIT14_BITNUM 6
#define T1MODH_BIT15_MASK 128
#define T1MODH_BIT15_BITNUM 7
#define T1MODH_BIT_8_MASK 255
#define T1MODH_BIT_8_BITNUM 0
/*** T1MODL - TIM Counter Modulo Register Low; 0x0000000F ***/
union {
byte Byte;
struct {
byte BIT0 :1; /* TIM1 Counter Modulo Bit */
byte BIT1 :1; /* TIM1 Counter Modulo Bit */
byte BIT2 :1; /* TIM1 Counter Modulo Bit */
byte BIT3 :1; /* TIM1 Counter Modulo Bit */
byte BIT4 :1; /* TIM1 Counter Modulo Bit */
byte BIT5 :1; /* TIM1 Counter Modulo Bit */
byte BIT6 :1; /* TIM1 Counter Modulo Bit */
byte BIT7 :1; /* TIM1 Counter Modulo Bit */
} Bits;
struct {
byte grpBIT :8;
} MergedBits;
} T1MODLSTR;
#define T1MODL _T1MOD.Overlap_STR.T1MODLSTR.Byte
#define T1MODL_BIT0 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT0
#define T1MODL_BIT1 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT1
#define T1MODL_BIT2 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT2
#define T1MODL_BIT3 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT3
#define T1MODL_BIT4 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT4
#define T1MODL_BIT5 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT5
#define T1MODL_BIT6 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT6
#define T1MODL_BIT7 _T1MOD.Overlap_STR.T1MODLSTR.Bits.BIT7
#define T1MODL_BIT _T1MOD.Overlap_STR.T1MODLSTR.MergedBits.grpBIT
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -