bdmcf.c
来自「bdm源代码. coldfire处理器用」· C语言 代码 · 共 942 行 · 第 1/3 页
C
942 行
#else
lda #(BDMCF_IDLE/2)
#endif
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
/* transmit bit 5 */
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
/* transmit bit 4 */
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
/* transmit bit 3 */
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
/* transmit bit 2 */
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
/* transmit bit 1 */
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
/* transmit bit 0 */
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
/* finish the transmission */
#ifdef INVERT
sec /* bring the DSI_OUT low, we need to spend 2 cycles doing something anyway to make the timing right */
#else
clc
#endif
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* create falling edge on DSCLK */
}
}
/* receives 8 bits */
unsigned char bdmcf_rx8_1(void) {
asm {
lda #BDMCF_IDLE /* preload idle state of signals into A */
sta PTA /* bring DSCLK and DSI low */
clrh /* load address of PTC to H:X */
ldx @DSO_IN_PORT
/* receive bit 7 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
/* receive bit 6 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
/* receive bit 5 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
/* receive bit 4 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
/* receive bit 3 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
/* receive bit 2 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
/* receive bit 1 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
/* receive bit 0 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create falling edge on DSCLK */
#else
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
lsr ,X /* shift the input data bit (PTC0) into C */
rola /* shift the sampled bit into A from the bottom */
#ifdef INVERT
coma /* invert the data */
#endif
}
}
/* transmits and receives 8 bits */
unsigned char bdmcf_txrx8_1(unsigned char data) {
asm {
tax /* move the input data to X */
#ifdef INVERT
comx /* invert the data */
#endif
#ifdef DEBUG
lda #(BDMCF_IDLE*2)
#else
lda #(BDMCF_IDLE/2)
#endif
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
sta PTA /* bring DSCLK low and write the first (MSB) bit value to the port */
/* transmit and receive bit 7 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
lsrx /* shift X back to what it was */
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
lsr PTC /* shift the input data bit (PTC0) into C */
rolx /* shift the sample into X from the bottom */
/* transmit and receive bit 6 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
bset DSCLK_OUT_BITNUM,DSCLK_OUT_PORT
#endif
#ifdef DEBUG
lda #(BDMCF_IDLE*2) /* reload idle value into A */
#else
lda #(BDMCF_IDLE/2)
#endif
lslx /* shift MSB into C */
#ifdef DEBUG
rora /* rotate C into A */
#else
rola
#endif
lsrx /* shift X back to what it was */
sta PTA /* create falling edge on DSCLK and write the next bit value to the port */
lsr PTC /* shift the input data bit (PTC0) into C */
rolx /* shift the sample into X from the bottom */
/* transmit and receive bit 5 */
#ifdef INVERT
bclr DSCLK_OUT_BITNUM,DSCLK_OUT_PORT /* create rising edge on DSCLK */
#else
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